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1. WO1988009016 - VECTOR PROCESSOR FOR PROCESSING RECURRENT EQUATIONS AT A HIGH SPEED

Publication Number WO/1988/009016
Publication Date 17.11.1988
International Application No. PCT/JP1988/000464
International Filing Date 14.05.1988
IPC
G06F 15/78 2006.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general; Data processing equipment in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
G06F 17/11 2006.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
17Digital computing or data processing equipment or methods, specially adapted for specific functions
10Complex mathematical operations
11for solving equations
CPC
G06F 15/8053
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
80comprising an array of processing units with common control, e.g. single instruction multiple data processors
8053Vector processors
G06F 17/11
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
17Digital computing or data processing equipment or methods, specially adapted for specific functions
10Complex mathematical operations
11for solving equations ; , e.g. nonlinear equations, general mathematical optimization problems
G06F 17/13
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
17Digital computing or data processing equipment or methods, specially adapted for specific functions
10Complex mathematical operations
11for solving equations ; , e.g. nonlinear equations, general mathematical optimization problems
13Differential equations
Applicants
  • FUJITSU LIMITED [JP]/[JP] (AllExceptUS)
  • HOSHINO, Akihiko [JP]/[JP] (UsOnly)
  • NAKATANI, Shoji [JP]/[JP] (UsOnly)
  • KURODA, Koji [JP]/[JP] (UsOnly)
  • KAWAI, Tetsu [JP]/[JP] (UsOnly)
Inventors
  • HOSHINO, Akihiko
  • NAKATANI, Shoji
  • KURODA, Koji
  • KAWAI, Tetsu
Agents
  • AOKI, Akira @
Priority Data
62/11771914.05.1987JP
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) VECTOR PROCESSOR FOR PROCESSING RECURRENT EQUATIONS AT A HIGH SPEED
(FR) PROCESSEUR VECTORIEL POUR LE TRAITEMENT A HAUTE VITESSE D'EQUATIONS RECURRENTES
Abstract
(EN) An improved vector processor for processing a modified recurrent equation: ai = ai-2 x bi-1 x bi + bi x ci-1 + ci, where i is an integer: i = 1, 2, 3, ..., n, at a high speed. The vector processor includes a data distribution circuit (40a, 40b), at least one odd term calculation circuit (10A, 10AA), and at least one even term calculation circuit (10B, 10BB). The odd term calculation circuit calculates odd terms of the modified recurrent equation: aj = (aj-2 x bj-1 x bj) + (bj x cj-1) + cj, where j is an odd integer. The even term calculation circuit calculates even terms of the recurrent equations: ak = (ak-2 x bk-1 x bk) + (bk x ck-1) + ck, where k is an even integer. The data distribution circuit receives an initial, data a0 and input vector (operand) data (bi) and (ci), and distributes that data to the odd and even term calculation circuits in a predetermined manner so that the above odd and even terms are calculated.
(FR) Processeur vectoriel amélioré pour le traitement à haute vitesse d'une équation récurrente modifiée ai = ai-2 x bi-1 x bi + bi x ci-1 + ci, où i est un nombre entier i = 1, 2, 3, ..., n. Le processeur vectoriel comprend un circuit de distribution de données (40a, 40b), au moins un circuit de calcul de termes impairs (10A, 10AA), et au moins un circuit de calcul de termes pairs (10B, 10BB). Le circuit de calcul de termes impairs calcule les termes impairs de l'équation récurrente modifiée aj = (aj-2 x bj-1 x bj) + (bj x cj-1) + cj, où j est un nombre entier impair. Le circuit de calcul de termes pairs calcule les termes pairs des équations récurrentes ak = (ak-2 x bk-1 x bk) + (bk x ck-1) + ck, où k est un nombre entier pair. Le circuit de distribution de données reçoit une donnée a0 initiale et des données de vecteurs d'entrée (opérandes) (bi) et (ci), et distribue de manière déterminée ces données aux circuits de calcul de termes pairs et impairs, afin de permettre le calcul desdits termes pairs et impairs.
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