WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO1988007290) CURRENT SENSING DIFFERENTIAL AMPLIFIER
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1988/007290    International Application No.:    PCT/US1988/000735
Publication Date: 22.09.1988 International Filing Date: 08.03.1988
IPC:
G11C 7/06 (2006.01), H03K 5/24 (2006.01)
Applicants: INMOS CORPORATION [US/US]; P.O. Box 16000, Colorado Springs, CO 80906 (US)
Inventors: MOBLEY, Kenneth, J.; (US)
Agent: MANZO, Edward, D.; Cook, Wetzel & Egan Ltd., 135 South LaSalle Street, Chicago, IL 60603 (US)
Priority Data:
023,184 09.03.1987 US
Title (EN) CURRENT SENSING DIFFERENTIAL AMPLIFIER
(FR) AMPLIFICATEUR DIFFERENTIEL DETECTANT LE COURANT
Abstract: front page image
(EN)An amplifier (10) for a semiconductor circuit provides two circuit paths between VCC and ground, each including the source-drain path of a corresponding primary transistor (23, 28). Two impedances (16, 18) are coupled to respective inputs (12, 14). The primary transistors are kept in saturation so that the voltage differential is developed at outputs (38, 40) located along the two circuit paths. Also, a clamp circuit has a common node (30) coupling the gate electrodes of the primary transistors together. Secondary transistors (24, 26) are included to mimic voltage changes on either input.
(FR)Un amplificatuer (10) pour un circuit à semiconducteurs fournit deux itinéraires de circuit entre une tension VCC et la terre, cha cun incluant l'itinéraire entre la source et le drain d'un transistor primaire correspondant (23, 28). Deux impédances (16, 18) sont couplées aux entrées respectives (12, 14). Les transistors primaires sont maintenus à saturation de manière que le différentiel de tension soit développé aux sorties (38, 40) situées le long des deux itinéraires de circuit. De plus, un circuit de blocage a un n÷ud commun (30) couplant les portillons des transistors primaires. Des transistors secondaires (24, 26) sont inclus pour simuler les changements de tension à l'une ou à l'autre des entrées.
Designated States: JP.
European Patent Office (DE, FR, GB, IT, NL).
Publication Language: English (EN)
Filing Language: English (EN)