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1. (WO1987003742) MESFET DEVICE HAVING A SEMICONDUCTOR SURFACE BARRIER LAYER
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1987/003742 International Application No.: PCT/US1986/002453
Publication Date: 18.06.1987 International Filing Date: 14.11.1986
IPC:
H01L 21/265 (2006.01) ,H01L 21/306 (2006.01) ,H01L 21/76 (2006.01) ,H01L 29/47 (2006.01) ,H01L 29/812 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26
Bombardment with wave or particle radiation
263
with high-energy radiation
265
producing ion implantation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
43
characterised by the materials of which they are formed
47
Schottky barrier electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
80
with field effect produced by a PN or other rectifying junction gate
812
with a Schottky gate
Applicants:
ALLIED CORPORATION [US/US]; Law Department (F.M. Leather) P.O. Box 2245-R Morristown, NJ 07960, US
Inventors:
AINA, Olaleye, Adetoro; US
Agent:
WINTER, Richard, C.; Allied Corporation Law Department (F.M. Leather) P.O. Box 2245-R Morristown, NJ 07960, US
Priority Data:
808,92013.12.1985US
Title (EN) MESFET DEVICE HAVING A SEMICONDUCTOR SURFACE BARRIER LAYER
(FR) DISPOSITIF MESFET AYANT UNE COUCHE-BARRIERE DE SURFACE SEMICONDUCTRICE
Abstract:
(EN) An InP MESFET having a semiconductor surface barrier layer (6) formed of GaInP or AlInP. The semiconductor surface barrier layer is formed between an active layer (4) and a gate electrode (8) and the barrier height of the gate for the semiconductor surface barrier layer is higher than the barrier height of the gate for InP. In a method of forming an InP MESFET according to the present invention, the semiconductor surface barrier layer is formed by high dose implantation of Ga or Al into the active region. Surface barrier layers formed of other compounds, for example GaInAsP or AlInAsP, which have a lattice match with InP can be formed by other methods such as epitaxial growth.
(FR) Un InP MESFET (transistors à effet de champ semiconducteur métallique au phosphore d'indium) possède une couche-barrière de surface semiconductrice (6) formée avec du GaInP ou AlInP. La couche-barrière de surface semiconductrice est formée entre une couche active (4) et une électrode de porte (8) et la hauteur de la barrière de la porte pour la couche-barrière de surface semiconductrice est plus élevée que la hauteur de la barrière de la porte pour l'InP. Dans un procédé de formation d'un InP MESFET selon la présente invention, la couche-barrière de surface semiconductrice est formée par une implantation à haute dose de Ga ou de Al dans la région active. Des couches-barrières de surface formées d'autres composés, par exemple GaInAsP ou AlInAsP, qui présentent une correspondance de réseaux avec InP peuvent être formées par d'autres procédés, tels que la croissance épitaxiale.
Designated States: JP
European Patent Office (AT, BE, CH, DE, FR, GB, IT, LU, NL, SE)
Publication Language: English (EN)
Filing Language: English (EN)