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1. (WO1985004516) PROCESS FOR MANUFACTURING ELECTRIC INSULATION ZONES OF INTEGRATED CIRCUIT COMPONENTS
Latest bibliographic data on file with the International Bureau

Pub. No.: WO/1985/004516 International Application No.: PCT/FR1985/000066
Publication Date: 10.10.1985 International Filing Date: 29.03.1985
IPC:
H01L 21/762 (2006.01) ,H01L 21/763 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
762
Dielectric regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
763
Polycrystalline semiconductor regions
Applicants:
BOIS, Daniel [FR/FR]; FR
Inventors:
BOIS, Daniel; FR
Agent:
SOCIETE FRANÇAISE POUR LA GESTION DES BREVETS D'AP; PLICATION NUCLEAIRE BREVATOME; 25, rue de Ponthieu; F-75008 Paris, FR
Priority Data:
84/0505130.03.1984FR
Title (EN) PROCESS FOR MANUFACTURING ELECTRIC INSULATION ZONES OF INTEGRATED CIRCUIT COMPONENTS
(FR) PROCEDE DE FABRICATION DE ZONES D'ISOLATION ELECTRIQUE DES COMPOSANTS D'UN CIRCUIT INTEGRE
Abstract:
(EN) The process provides for the making of a mask (4) on a silicon (2) substrate to define the locations of the insulation zones to be made, the doping of the unmasked regions (6) of the substrate, the thermal oxidation of said substrate regions, the making of a trench (10) in each oxidized region (8) of the substrate, and in the regions of the substrate situated under said oxidized regions, the thermal oxidation of the edges of the trenches (10), the filling of the trenches (10) with an insulating dielectric (14), and the elimination of the mask (4).
(FR) Ce procédé consiste à réaliser un masque (4) sur un substrat en silicium (2) pour définir les emplacements des zones d'isolation à réaliser, à doper des régions (6) du substrat non masquées, à oxyder thermiquement lesdites régions du substrat, à réaliser une tranchée (10) dans chaque région oxydée (8) du substrat, et dans les régions du substrat situées au-dessous desdites régions oxydées, à oxyder thermiquement les bords des tracnchées (10), à remplir les tranchées (10) par un diélectrique (14) isolant, et à éliminer le masque (4).
Designated States: JP, US
Publication Language: French (FR)
Filing Language: French (FR)
Also published as:
US4679304