WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Search
 
Browse
 
Translate
 
Options
 
News
 
Login
 
Help
 
Machine translation
1. (WO1981000633) SPECIAL ADDRESS GENERATION ARRANGEMENT
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1981/000633    International Application No.:    PCT/US1980/001017
Publication Date: 05.03.1981 International Filing Date: 11.08.1980
IPC:
G06F 12/04 (2006.01), G06F 9/345 (2006.01)
Applicants:
Inventors:
Priority Data:
71717 31.08.1979 US
Title (EN) SPECIAL ADDRESS GENERATION ARRANGEMENT
(FR) DISPOSITIF DE GENERATION D'ADRESSES SPECIALES
Abstract: front page image
(EN)In the microcomputer and computer system field, there are arrangements, such as direct memory access circuits, which automatically generate a sequence of addresses in response to an initial address. The sequence of consecutive addresses is terminated by decrementing to zero a number representing the number of consecutive addresses required. This method for terminating the sequence requires attention of a programmer to enter the correct data for terminating the sequence of addresses. The disclosed arrangement (45, 61, 62, 99, 102) generates a sequence of addresses in response to an initial address and disables generation of the sequence of addresses in response to a control signal (LAST NIB) produced from at least a portion of the initial address at the conclusion of generation of a predetermined number of sequential addresses, the predetermined number being decoded from the initial address.
(FR)Dans le domaine des systemes d'ordinateurs et de micro-ordinateurs, se trouvent des dispositifs, tels que des circuits d'acces direct de memoire, qui generent automatiquement une sequence d'adresses en reponse a une adresse initiale. La sequence d'adresses consecutive se termine par decrementation jusqu'a 0 d'un nombre representant le nombre d'adresses consecutives requises. Cette methode de terminaison de la sequence demande l'attention d'un programmeur pour entrer les donnees correctes de maniere a terminer la sequence d'adresses. Le dispositif decrit (45, 61, 62, 99, 102) genere une sequence d'adresses en reponse a une adresse initiale et invalide la generation de la sequence d'adresses en reponse a un signal de commande (LAST NIB) produit a partir d'au moins une partie de l'adresse initiale a la fin de la generation d'un nombre predetermine d'adresses sequentielles, le nombre predetermine etant decode a partir de l'adresse initiale.
Designated States:
Publication Language: English (EN)
Filing Language: English (EN)