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Machine translation
1. (WO1980001425) CONTROL CIRCUIT FOR REFRESHING A DYNAMIC MEMORY
Latest bibliographic data on file with the International Bureau   

Pub. No.:    WO/1980/001425    International Application No.:    PCT/US1979/001141
Publication Date: 10.07.1980 International Filing Date: 28.12.1979
IPC:
G11C 11/406 (2006.01), G11C 11/4072 (2006.01)
Applicants:
Inventors:
Priority Data:
1983 08.01.1979 US
Title (EN) CONTROL CIRCUIT FOR REFRESHING A DYNAMIC MEMORY
(FR) CIRCUIT DE CONTROLE POUR LA REGENERATION D"UNE MEMOIRE DYNAMIQUE
Abstract: front page image
(EN)A circuit which efficiently controls the refresh operation of a dynamic memory. The refresh control circuit operates such that a dynamic memory (28) coupled to a processing means responds to a memory access signal (BMREQ) for a read/write operation and a first refresh control signal (BMREF) for a memory refresh operation. First circuits (30, 32) provide a second periodic refresh control signal (REFREQ), and second circuits (34, 40) refresh the memory under the control of either of the first (BMREF) or second (REFREQ) refresh control signals. A third circuit (20) responsive to the memory access signal (BMREQ) and the second refresh control signal (REFREQ) awards priority of access to the memory (28) in accordance with the first active signal which it receives. A fourth circuit (20) puts the processing means in a hold condition when priority is awarded to the second refresh control signal (REFREQ). In a power down condition a (BRST) signal enables gates (42) having a battery back up to permit the dynamic memory to be refreshed.
(FR)Circuit qui controle efficacement l"operation de regeneration d"une memoire dynamique. Ce circuit de controle de regeneration fonctionne de maniere telle qu"une memoire dynamique (28) accouplee a un moyen de traitement repond a un signal d"acces a la memoire (BMREQ) pour une operation de lecture/ecriture et a un premier signal de controle de regeneration (BMREF) pour une operation de regeneration de la memoire. Des premiers circuits (30, 32) fournissent un second signal periodique de controle de regeneration (REFREQ) et des seconds circuits (34, 40) regenerent1a memoire sous le controle soit du premier (BMREF) soit du second (REFREQ) signal de controle de regeneration U n troisieme circuit (20) sensible au signal d"acces a la memoire (BMREQ) et au second signal de controle de la regeneration (REFREQ) attribue la priorite d"acces a la memoire (28) en accord avec le premier signal qu"il recoit. Un quatrieme circuit (20) met le moyen de traitement en une position de prise lorsque la priorite est attribuee au second signal de controle de regeneration (REFREQ). En cas de manque de puissance un signal (BRST) permet a des portes (42) ayant une batterie de secours de permettre la regeneration de la memoire dynamique.
Designated States:
Publication Language: English (EN)
Filing Language: English (EN)