1. US20130018933 - Data Shifter and Control Method Thereof, Multiplexer, Data Sifter, and Data Sorter

A data shifter (10) includes plural stages each including N elemental units (20), each preliminarily assigned a one-bit value c and a positive integer q. The mth elemental unit in the pth stage inputs target data and destination data representing a lane number where Data(p,m), a logical OR of the input target data, should be routed to; compares the qth bit from the LSB of Des(p,m), a logical OR of the input destination data, with the c; and outputs, based on the comparison result, both Data(p,m) or the value 0 and Des(p,m) or the value 0 bound for the mth elemental unit in the next stage, and if m−1+2^q-1<N, further outputs both the other of Data(p,m) and the value 0 and the other of Des(p,m) and the value 0 bound for the (m+2^q-1)th elemental unit in the next stage. The shifter inputs both the N-lane data sequences to be processed as the target data and the destination data of each data sequence into the N elemental units in the first stage, and outputs, as shifted output data of the mth lane, a logical OR of the target data which the elemental units in the last stage output bound for the mth elemental unit in the next stage.