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1. US20090313533 - Efficient in-band reliability with separate cyclic redundancy code frames

Office United States of America
Application Number 12139610
Application Date 16.06.2008
Publication Number 20090313533
Publication Date 17.12.2009
Grant Number 08321778
Grant Date 27.11.2012
Publication Kind B2
IPC
H03M 13/00
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
G06F 11/10
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
10Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
Applicants Intel Corporation
Inventors Bains Kuljit
Agents Blakely, Sokoloff, Taylor & Zafman LLP
Title
(EN) Efficient in-band reliability with separate cyclic redundancy code frames
Abstract
(EN)

Embodiments of the invention are generally directed to systems, methods, and apparatuses for efficient in-band reliability with separate cyclic redundancy code (CRC) frames. In some embodiments, a memory system uses data frames to transfer data between a host and a memory device. The system also uses a separate frame (e.g., a CRC frame) to transfer a CRC checksum that covers the data frames.