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1. US6178121 - Semiconductor memory device, semiconductor device, and electronic apparatus using the semiconductor device

Office
United States of America
Application Number 09367053
Application Date 28.09.1999
Publication Number 6178121
Publication Date 23.01.2001
Grant Number 6178121
Grant Date 23.01.2001
Publication Kind B1
IPC
G11C 7/00
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
G11C 11/407
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
G11C 11/4074
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
CPC
G11C 11/4074
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
Applicants Seiko Epson Corporation
Inventors Maruyama, Akira
Agents Oliff & Berridge PLC
Priority Data 09341088 11.12.1997 JP
Title
(EN) Semiconductor memory device, semiconductor device, and electronic apparatus using the semiconductor device
Abstract
(EN)

A memory cell (1) with a MOS transistor (5) and a data-storing capacitor (7). One of two input/output electrodes of the MOS transistor (5) is connected to a bit line (36) and a gate electrode is connected to a word line (38). A first electrode (6) of the data-storing capacitor (7) is connected to the other input/output electrode of the MOS transistor (5) and a second electrode (14) is connected to a potential control circuit (40). When the data stored in the memory cell (1) is “HIGH”, the potential control circuit (40) changes the potential of the second electrode (14) of the data-storing capacitor (7) from a precharge potential VCC/2 to a ground potential GND after data-writing and data-readout operations are completed. When the data stored in the memory cell (1) is “LOW”, the potential control circuit (40) changes the potential of the second electrode (14) of the data-storing capacitor (7) from the precharge potential VCC/2 to a power potential VCC after data-writing and data-readout operations are completed.


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