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138. US4404629 - Data processing system with latch for sharing instruction fields

Office United States of America
Application Number 06228441
Application Date 26.01.1981
Publication Number 4404629
Publication Date 13.09.1983
Grant Number 4404629
Grant Date 13.09.1983
Publication Kind A
IPC
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
22
Micro-control or micro-programme arrangements
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
22
Micro-control or micro-programme arrangements
26
Address formation of the next micro-instruction
G06F 9/22
G06F 9/26
CPC
G06F 9/265
Applicants Atari, Inc.
Inventors Albaugh Michael E.
Agents Townsend and Townsend
Title
(EN) Data processing system with latch for sharing instruction fields
Abstract
(EN)

A microprocessor, having a memory element containing a plurality of multi-bit instruction words, an arithmetic logic (ALU) unit coupled to the memory element and responsive to at least a portion of each of the instruction words for performing data manipulations, and a controller for generating address signals that are communicated to the memory element to cause sequential access of the instruction words, includes a storage element that interconnects certain of the signal lines that communicate the instruction words to the ALU to the controller. In response to a first predetermined instruction word the storage element receives and stores the portion of the instruction word being conducted to the ALU. In response to a second predetermined instruction word, the content of the storage element is transferred to the controller to form an address signal.