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1. US20200185049 - MULTI-LEVEL SIGNALING FOR A MEMORY DEVICE

Office United States of America
Application Number 16681587
Application Date 12.11.2019
Publication Number 20200185049
Publication Date 11.06.2020
Publication Kind A1
IPC
G11C 29/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation; Testing stores during standby or offline operation
04Detection or location of defective memory elements
08Functional testing, e.g. testing during refresh, power-on self testing or distributed testing
10Test algorithms, e.g. memory scan algorithms; Test patterns, e.g. checkerboard patterns
H04L 1/00
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
CPC
H04L 1/0003
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
1Arrangements for detecting or preventing errors in the information received
0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
0002by adapting the transmission rate
0003by switching between different modulation schemes
G11C 29/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
10Test algorithms, e.g. memory scan [MScan] algorithms; Test patterns, e.g. checkerboard patterns 
Applicants Micron Technology, Inc.
Inventors Wolfgang Anton Spirkl
Michael Dieter Richter
Thomas Hein
Peter Mayer
Martin Brox
Title
(EN) MULTI-LEVEL SIGNALING FOR A MEMORY DEVICE
Abstract
(EN)

Methods, systems, and devices for testing of multi-level signaling associated with a memory device are described. A tester may be used to test one or more operations of a memory device. The memory device may be configured to communicate data using a modulation scheme that includes three or more symbols. The tester may be configured to communicate data using a modulation scheme that includes three or fewer symbols. Techniques for testing the memory device using such a tester are described.

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