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1. US20140239453 - Multiple bonding layers for thin-wafer handling

Office
United States of America
Application Number 14273369
Application Date 08.05.2014
Publication Number 20140239453
Publication Date 28.08.2014
Grant Number 09472436
Grant Date 18.10.2016
Publication Kind B2
IPC
H01L 21/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 21/683
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683for supporting or gripping
H01L 21/20
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H01L 23/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
B32B 38/00
BPERFORMING OPERATIONS; TRANSPORTING
32LAYERED PRODUCTS
BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
38Ancillary operations in connection with laminating processes
B32B 38/10
BPERFORMING OPERATIONS; TRANSPORTING
32LAYERED PRODUCTS
BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
38Ancillary operations in connection with laminating processes
10Removing layers, or parts of layers, mechanically or chemically
CPC
H01L 21/6835
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
B32B 38/0008
BPERFORMING OPERATIONS; TRANSPORTING
32LAYERED PRODUCTS
BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
38Ancillary operations in connection with laminating processes
0008Electrical discharge treatment, e.g. corona, plasma treatment; wave energy or particle radiation
B32B 38/10
BPERFORMING OPERATIONS; TRANSPORTING
32LAYERED PRODUCTS
BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
38Ancillary operations in connection with laminating processes
10Removing layers, or parts of layers, mechanically or chemically
B32B 43/006
BPERFORMING OPERATIONS; TRANSPORTING
32LAYERED PRODUCTS
BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
43Operations specially adapted for layered products and not otherwise provided for, e.g. repairing; Apparatus therefor
006Delaminating
H01L 21/2007
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth ; solid phase epitaxy
2003Characterised by the substrate
2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
H01L 21/6836
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
6836Wafer tapes, e.g. grinding or dicing support tapes
Applicants Brewer Science Inc.
Inventors Rama Puligadda
Xing-Fu Zhong
Tony D. Flaim
Jeremy McCutcheon
Agents Hovey Williams LLP
Title
(EN) Multiple bonding layers for thin-wafer handling
Abstract
(EN)

Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.