SG2014014922 MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING

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Singapore

Application Number 2014014922

Application Date 05.08.2011

Publication Number 2014014922

Publication Date 30.07.2014

Publication Kind A1

CPC

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Applicants BREWER SCIENCE INC.

Inventors PULIGADDA, RAMA
ZHONG, XING-FU
FLAIM, TONY, D.
MCCUTCHEON, JEREMY

Priority Data 13198294 04.08.2011 US
61/371,517 06.08.2010 US

Title

(EN) MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING

Abstract

(EN) MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING ABSTRACT 5Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, 10it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side. 15Fig. 2

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02	Manufacture or treatment of semiconductor devices or of parts thereof
04	the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18	the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or A_IIIB_V compounds with or without impurities, e.g. doping materials
20	Deposition of semiconductor materials on a substrate, e.g. epitaxial growth ; solid phase epitaxy
2003	Characterised by the substrate
2007	Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67	Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683	for supporting or gripping
6835	using temporarily an auxiliary support

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67	Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683	for supporting or gripping
68304	using temporarily an auxiliary support
68318	Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67	Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683	for supporting or gripping
68304	using temporarily an auxiliary support
68327	used during dicing or grinding

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221	Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67	Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683	for supporting or gripping
68304	using temporarily an auxiliary support
6834	used to protect an active side of a device or wafer

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1. SG2014014922 - MULTIPLE BONDING LAYERS FOR THIN-WAFER HANDLING

Y	SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
10	TECHNICAL SUBJECTS COVERED BY FORMER USPC
T	TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
156	Adhesive bonding and miscellaneous chemical manufacture
10	Methods of surface bonding and/or assembly therefor

B	PERFORMING OPERATIONS; TRANSPORTING
32	LAYERED PRODUCTS
B	LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
38	Ancillary operations in connection with laminating processes
0008	Electrical discharge treatment, e.g. corona, plasma treatment; wave energy or particle radiation