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1. KR1020030058862 - LINE STRUCTURE, THIN FILM TRANSISTOR SUBSTRATE USING THE SAME, AND METHOD FOR MANUFACTURING THEREOF

Office
Republic of Korea
Application Number 1020020000097
Application Date 02.01.2002
Publication Number 1020030058862
Publication Date 07.07.2003
Grant Number 1009800080000
Grant Date 03.09.2010
Publication Kind B1
IPC
G02F 1/136
GPHYSICS
02OPTICS
FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01for the control of the intensity, phase, polarisation or colour
13based on liquid crystals, e.g. single liquid crystal display cells
133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
Applicants SAMSUNG ELECTRONICS CO., LTD.
삼성전자주식회사
Inventors CHO, BEOM SEOK
조범석
JUNG, CHANG O
정창오
Agents 팬코리아특허법인
Title
(EN) LINE STRUCTURE, THIN FILM TRANSISTOR SUBSTRATE USING THE SAME, AND METHOD FOR MANUFACTURING THEREOF
(KO) 배선 구조, 이를 이용하는 박막 트랜지스터 기판 및 그제조 방법
Abstract
(EN)

PURPOSE: A line structure, a thin film transistor substrate using the same, and a method for manufacturing thereof are provided to realize low resistance line, and complement bonding power and chemical-resistance of Ag.

CONSTITUTION: A plurality of gate wires(22,24,26) are formed on an insulating substrate(10). A first insulating film(30) is formed on the gate wires. A plurality of data wires(65,66,68) are formed on the first insulating film and cross the gate wires. Thin film transistors are electrically connected with the gate wires and the data wires. A passivation film(70) is formed on the thin film transistors and has first contact holes(76) exposing drain electrodes of the thin film transistors. A pixel electrode(82) is formed on the passivation film and is connected with the drain electrodes through the contact holes. The gate wires and the data wires are triple layers made up of bonding layers, Ag layer, and passivation layers. The bonding layer is formed of anyone of Cr, Cr alloy, Ti, Ti alloy, Mo, Mo alloy, Ta, and Ta alloy. The Ag layer is formed of Ag or Ag alloy. The passivation layer is formed of anyone of IZO, Mo, Mo alloy, Cr, and Cr alloy.

© KIPO 2003


(KO) 절연 기판 위에 게이트 배선이 형성되어 있고, 게이트 절연막이 게이트 배선을 덮고 있으며, 게이트 절연막 위에 반도체 패턴이 형성되어 있다. 반도체 패턴과 게이트 절연막 위에는 소스 전극 및 드레인 전극과 데이터선을 포함하는 데이터 배선이 형성되어 있고, 데이터 배선 위에는 보호막이 형성되어 있다. 보호막 위에는 접촉 구멍을 통하여 드레인 전극과 연결되는 있는 화소 전극이 형성되어 있다. 이 때, 게이트 배선 및 데이터 배선은 접착층, Ag층 및 보호층의 3중층으로 이루어져 있으며, 접착층은 Cr, Cr 합금, Ti, Ti 합금, Mo, Mo 합금, Ta, Ta 합금 중의 어느 하나로 이루어져 있고, Ag층은 Ag 또는 Ag 합금으로 이루어져 있으며, 보호층은 IZO, Mo, Mo 합금, Cr, Cr 합금 중의 어느 하나로 이루어져 있다.