(EN) PURPOSE: A semiconductor chip laminate package and a manufacturing method thereof are provided to simplify a process by self-alignment. CONSTITUTION: A planar chip is prepared(S10). The attachment surface of the chip is processed with a hydrophilic surface(S20). The other surface of the chip is processed with a hydrophobic surface(S30). The hydrophilic surface processed part is contacted with the exposed part of the chip and is aligned(S40). The chip is fixed by applying heat or pressure(S50). A wire is attached to the connection unit of the aligned chip(S60). COPYRIGHT KIPO 2011
(KO) 본 발명은 반도체 칩 적층 패키지 및 그 제조 방법에 관한 것으로서, 더욱 상세하게, 복수개의 칩을 정밀한 장치 또는 작업 없이 빠르게 정렬 및 본딩 가능하여 생산성을 향상할 수 있는 반도체 칩 적층 패키지 및 그 제조 방법에 관한 것이다.