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Machine translation
1. (KR1020160034717) SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
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Application Number: 1020140126053 Application Date: 22.09.2014
Publication Number: 1020160034717 Publication Date: 30.03.2016
Publication Kind : A
IPC:
H01L 23/28
H01L 23/488
CPC:
H01L 24/09
H01L 21/565
H01L 23/3128
H01L 23/3135
H01L 23/3142
H01L 23/315
H01L 23/481
H01L 23/49811
H01L 23/49838
H01L 23/49861
H01L 23/5389
H01L 24/13
H01L 24/16
H01L 24/17
H01L 24/81
H01L 25/0657
H01L2224/0401
H01L2224/05022
H01L2224/05572
H01L2224/131
H01L2224/16146
H01L2224/16227
H01L2224/16237
H01L2224/17181
H01L2224/73204
H01L2224/8192
H01L2225/06513
H01L2225/06517
H01L2225/06541
H01L2225/06565
H01L2924/141
H01L2924/143
H01L2924/1431
H01L2924/1434
H01L2924/15311
H01L2924/18161
Applicants: 삼성전자주식회사
SAMSUNG ELECTRONICS CO., LTD.SAMSUNG ELECTRONICS CO., LTD.
Inventors: JANG JIN WOOKJANG JIN WOOK
YOO, SE JINYOO, SE JIN
CHO, SUNG ILCHO, SUNG IL
장진욱
CHOI, JAE HOCHOI, JAE HO
유세진
조성일
최재호
Agents: 리앤목특허법인
Priority Data:
Title: (KO) 반도체 패키지 및 그 제조 방법
(EN) SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
Abstract:
(KO) 본 발명의 반도체 패키지는 서로 떨어져 위치하는 복수개의 솔더 패드들을 갖는 배선 기판과, 복수개의 솔더들을 통하여 상기 솔더 패드들과 플립칩 형태로 연결된 복수개의 칩 패드들을 구비하는 칩과, 상기 칩 및 솔더들을 밀봉하도록 구성되고 상기 솔더들 사이에 적어도 하나의 보이드가 형성된 밀봉층과, 상기 보이드에 의해 노출된 상기 솔더들의 일측벽에 형성된 솔더 유출 방지층을 포함한다.
(EN) The present invention relates to a semiconductor package. The semiconductor package includes: a wiring substrate including multiple solder pads placed away from each other; a chip including multiple chip pads connected with the solder pads in a flip-chip shape through multiple solders; a sealing layer configured to seal the chip and the solders, and formed with at least one void between the solders; and a solder leak preventing layer formed on a side wall of the solders exposed by the void. Therefore, the present invention is capable of preventing a short circuit between adjacent solders. COPYRIGHT KIPO 2016