Feedback
Settings

Settings

Goto Application

1. JP2016106403 - MULTILAYER BONDING LAYER FOR THIN WAFER HANDLING

PermaLink
Office
Japan
Application Number 2015256806
Application Date 28.12.2015
Publication Number 2016106403
Publication Date 16.06.2016
Publication Kind A
IPC
H01L 21/02
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
CPC
H01L 21/2007
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth ; solid phase epitaxy
2003Characterised by the substrate
2007Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
H01L 21/6835
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
H01L 2221/68318
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68318Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
H01L 2221/68327
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68327used during dicing or grinding
H01L 2221/6834
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
6834used to protect an active side of a device or wafer
H01L 2221/68381
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
Applicants BREWER SCIENCE INC
ブルーワー　サイエンス　アイ　エヌ　シー．
Inventors PULIGADDA RAMA
プリガッダ　ラマ
ZHONG XING-FU
チョン　シン－フー
FRAME TONY D
フレイム　トニー　ディー．
JEREMY MCCUTCHAN
マカッチャン　ジェレミー
Agents 渡辺　望稔
三和　晴子
伊東　秀明
Priority Data 13198294 04.08.2011 US
61/371,517 06.08.2010 US
Title
(EN) MULTILAYER BONDING LAYER FOR THIN WAFER HANDLING
(JA) 薄ウェーハーハンドリングのための多層接合層
front page image
Abstract
(EN)

PROBLEM TO BE SOLVED: To provide a multilayer bonding layer system for provisionally bonding a semiconductor wafer.

SOLUTION: A precursor structure 10 includes a first substrate 12. The substrate has a front surface or a device surface 14, a back surface 16, and an outermost edge 18. A second precursor structure 22 includes a second substrate 24. A second composition is applied to a second substrate, so as to form a second bonding layer 32 on a carrier surface 26. The second bonding layer has an upper surface 33 separated from the second substrate, and a lower surface 35 contiguous to the second substrate. Depending on a composition used for formation of the second bonding layer, crosslinking reaction is started by calcination and the layer can be hardened.

SELECTED DRAWING: Figure 1

COPYRIGHT: (C)2016,JPO&INPIT


(JA)

【課題】半導体基板を暫定接合する多層接合層方式を提供する。
【解決手段】前駆体構造体１０は第１の基板１２を含む。基板は前面又はデバイス面１４，背面１６，最外側エッジ１８を有する。第２の前駆体構造体２２は第２の基板２４を含む。キャリヤー面２６上に第２の接合層３２を形成するように、第２の組成物が第２の基板に適用される。第２の接合層は第２の基板から離れた上部表面３３、及び第２の基板に隣接する下部表面３５を有する。第２の接合層を形成するために使用される組成物に依存して、焼成によって架橋反応が開始され層を硬化することができる。
【選択図】図１
Related patent documents
US20140162034
CN104022016
SG2014014922
SG10201506168W
SG10201509693Y
EP2601676
CN103155100
SG187739
EP2733734
KR1020130136975
KR1020140039330
EP2996140
KR1020170051530
JP2013535838
WO/2012/057893
US20140174627
JP2014158035
US20140239453
US20150122426
JP2016225662
# -