Processing

Please wait...

Settings

Settings

Goto Application

1. JP2014146729 - LOWER RECEIVING PINS ARRANGEMENT DETERMINATION SUPPORT DEVICE AND ARRANGEMENT DETERMINATION SUPPORT METHOD

Office
Japan
Application Number 2013015080
Application Date 30.01.2013
Publication Number 2014146729
Publication Date 14.08.2014
Grant Number 5903589
Grant Date 25.03.2016
Publication Kind B2
IPC
H05K 13/04
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
13Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
04Mounting of components
Applicants PANASONIC CORP
パナソニックIPマネジメント株式会社
Inventors TAKEHARA YUKI
竹原 裕起
YOKOI TAKAAKI
横井 敬明
Agents 藤井 兼太郎
鎌田 健司
前田 浩夫
Title
(EN) LOWER RECEIVING PINS ARRANGEMENT DETERMINATION SUPPORT DEVICE AND ARRANGEMENT DETERMINATION SUPPORT METHOD
(JA) 下受けピンの配置決定支援装置および配置決定支援方法
Abstract
(EN)

PROBLEM TO BE SOLVED: To provide an arrangement determination support device and an arrangement determination support method of lower receiving pins capable of facilitating a determination process of an arrangement of lower receiving pins commonly used for plural mounting work positions.

SOLUTION: In order to determine a disposition of lower receiving pins which support a component mounted plane of a substrate 3A being positioned at plural mounting work positions from the lower surface side, the arrangement determination support method includes the steps of: displaying an image including a substrate image representing shape and disposition of existing mounted components on an existing mounted plane on a display screen 35a; displaying a synthetic image in which a pin disposition image of input disposition positions SP1-SP5 of the lower receiving pins is overlapped with the substrate image on the displayed image; and displaying a synthetic image in which a first pin disposition image inputted disposition positions assuming a state the substrate 3A is positioned at a first mounting work position and a second pin disposition image generated based on the first pin disposition image assuming a state the substrate 3A is positioned at a second mounting work position are overlapped with the substrate image.

COPYRIGHT: (C)2014,JPO&INPIT


(JA)

【課題】複数の実装作業位置について共通に用いられる下受けピン配置の決定作業を簡略化することができる下受けピンの配置決定支援装置および配置決定支援方法を提供する。
【解決手段】複数の実装作業位置に位置決めされる基板3Aの既実装面を下面側から下受けする下受けピンの配置の決定に際し、既実装面における既実装部品の形状・配置を示す基板画像を含む画像を表示画面35a表示させ、表示された画像上に下受けピンの配置位置SP1〜SP5を入力したピン配置画像を基板画像に重ねた合成画像を表示させ、基板3Aが第1の実装作業位置に位置決めされた状態として配置位置が入力された第1のピン配置画像と、第2の実装作業位置に位置決めされた状態を想定して第1のピン配置画像に基づいて生成された第2のピン配置画像とを基板画像に重ねた合成画像を表示する。
【選択図】図11