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1. JP2002151484 - WASHING PROCESSING METHOD AFTER ETCHING

Office
Japan
Application Number 2001250341
Application Date 21.08.2001
Publication Number 2002151484
Publication Date 24.05.2002
Grant Number 4898030
Grant Date 06.01.2012
Publication Kind B2
IPC
H01L 21/308
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
308using masks
H01L 21/304
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304Mechanical treatment, e.g. grinding, polishing, cutting
CPC
H01L 28/55
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
28Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
40Capacitors
55with a dielectric comprising a perovskite structure material
H01L 21/02052
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02041Cleaning
02043Cleaning before device manufacture, i.e. Begin-Of-Line process
02052Wet cleaning only
H01L 21/0206
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02041Cleaning
02057Cleaning during device manufacture
0206during, before or after processing of insulating layers
H01L 21/31111
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3105After-treatment
311Etching the insulating layers ; by chemical or physical means
31105Etching inorganic layers
31111by chemical means
H01L 21/32134
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
321After treatment
3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
32133by chemical means only
32134by liquid etching only
H01L 28/75
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
28Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
40Capacitors
60Electrodes
75comprising two or more layers, e.g. comprising a barrier layer and a metal layer
Applicants AGILENT TECHNOL INC
アバゴ・テクノロジーズ・ジェネラル・アイピー(シンガポール)プライベート・リミテッド
Inventors WILLS MIRKARIMI LAURA
ローラ・ウィルス・ミルカリミ
GILBERT STEPHEN R
ステファン・アール・ギルバート
XING GUOQIANG
グオキアン・ジン
SUMMERFELT SCOTT
スコット・サマーフェルト
SAKODA TOMOYUKI
トモユキ・サコダ
MOISE TED
テッド・モイス
Agents 古谷 聡
溝部 孝彦
西山 清春
Priority Data 09650224 31.08.2000 US
Title
(EN) WASHING PROCESSING METHOD AFTER ETCHING
(JA) エッチング後の洗浄処理法
Abstract
(EN)

PROBLEM TO BE SOLVED: To provide a washing processing method after etching highly effective for removing the damage area of PZT in a FeRAM laminated structure with high selectivity so as not to damage other constituting elements.

SOLUTION: A washing processing (20) after etching to the semiconductor device of FeRAM or the like is disclosed. The processing includes the preparation of etchant containing both of a fluorine compound and a chlorine compound and the application to the semiconductor device of the etchant in a wet washing process.

COPYRIGHT: (C)2002,JPO

(JA)


【課題】FeRAM積層構造において、PZTの<HAN>タ゛メーシ゛</HAN>
領域の除去に極めて効果的であり、且つ他の構成要素に
害を及ぼさないように高い選択性を持つ、<HAN>エッチンク゛</HAN>後の洗
浄処理法の提供。


【解決手段】本発明は、FeRAM等の半導体<HAN>テ゛ハ゛イス</HAN>に
対する<HAN>エッチンク゛</HAN>後の洗浄処理(20)に関する。
この処理は、
フッ素化合物と塩素化合物の両方を含む<HAN>エッチンク゛</HAN>液を用意
することと、<HAN>ウエット</HAN>洗浄工程においてこの<HAN>エッチンク゛</HAN>液を半導
体<HAN>テ゛ハ゛イス</HAN>に適用することとを含む。

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