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1. EP2637165 - DRAWING DEVICE AND DRAWING METHOD

Office European Patent Office
Application Number 11837768
Application Date 27.01.2011
Publication Number 2637165
Publication Date 11.09.2013
Publication Kind A4
IPC
G09G 5/39
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
G09G 3/20
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G09G 5/00
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
G09G 5/393
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
CPC
G09G 3/3611
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
34by control of light from an independent source
36using liquid crystals
3611Control of matrices with row and column drivers
G09G 5/393
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
G09G 2360/127
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2360Aspects of the architecture of display systems
12Frame memory handling
127Updating a frame memory using a transfer of data from a source area to a destination area
Applicants MITSUBISHI ELECTRIC CORP
Inventors NAKATA MASANORI
KUSHIRO NORIYUKI
KATSUKURA MAKOTO
KOIZUMI YOSHIAKI
Designated States
Priority Data 2010245743 01.11.2010 JP
2011051667 27.01.2011 JP
Title
(DE) ZEICHNUNGSVORRICHTUNG UND ZEICHNUNGSVERFAHREN
(EN) DRAWING DEVICE AND DRAWING METHOD
(FR) DISPOSITIF DE DESSIN ET PROCÉDÉ DE DESSIN
Abstract
(EN)
A DMA controller (13A) operates independently from a CPU (10), reads image data stored on an ROM (11) sequentially in given units from the first reading start position of the image data and writes the image data into a buffer (30). A DMA controller (13B) operates independently from the CPU (10), writes the data read into the buffer (30) to a VRAM (15) one byte at a time from the writing start position. The controller (31) of a companion chip (3) updates the writing start position in the VRAM (15) to the position of the same column in the next row each time writing the data string in each row is completed.

(FR)
Selon l'invention, une unité de commande DMA (13A) fonctionne indépendamment d'une UCT (10), lit des données d'image enregistrées dans une ROM (11) selon une unité prédéfinie successivement depuis une position de début de lecture avant, et les enregistre dans un tampon (30). Une unité de commande DMA (13B) fonctionne indépendamment de l'UCT (10), et écrit les données lues dans le tampon (30) un octet à la fois successivement dans une direction horizontale depuis une position de début d'écriture de VRAM (15). Une unité de commande (31) d'une puce de comparaison (3) met à jour la position de début d'écriture de VRAM (15) à la même position de séquence dans la rangée suivante chaque fois que l'écriture de la séquence de données pour chaque rangée est terminée.