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1. (EP3389083) WET ETCHING COMPOSITION FOR SUBSTRATE HAVING SiN LAYER AND Si LAYER AND WET ETCHING METHOD USING SAME

Office : European Patent Office
Application Number: 17887878 Application Date: 22.09.2017
Publication Number: 3389083 Publication Date: 17.10.2018
Publication Kind : A4
Designated States: AL, AT, BA, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LI, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR
Prior PCT appl.: Application Number:JP2017034250 ; Publication Number: Click to see the data
IPC:
H01L 21/306
H01L 21/3213
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
321
After-treatment
3213
Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
CPC:
C09K 13/08
H01L 21/30604
H01L 21/32134
Applicants: MITSUBISHI GAS CHEMICAL CO
Inventors: HORITA AKINOBU
SHIMADA KENJI
TAKAHASHI KENICHI
OIE TOSHIYUKI
ITO AYA
Priority Data: 2016250545 26.12.2016 JP
2017034250 22.09.2017 JP
Title: (DE) NASSÄTZZUSAMMENSETZUNG FÜR SUBSTRAT MIT SIN-SCHICHT UND SI-SCHICHT UND NASSÄTZVERFAHREN DAMIT
(EN) WET ETCHING COMPOSITION FOR SUBSTRATE HAVING SiN LAYER AND Si LAYER AND WET ETCHING METHOD USING SAME
(FR) COMPOSITION DE GRAVURE HUMIDE POUR SUBSTRAT AYANT UNE COUCHE DE SiN ET UNE COUCHE DE Si ET PROCÉDÉ DE GRAVURE HUMIDE L'UTILISANT
Abstract:
(EN) The present invention relates to a wet etching composition for a substrate having a SiN layer and a Si layer, comprising 0.1-50 mass% fluorine compound (A), 0.04-10 mass% oxidant (B) and water (D) and having pH in a range of 2.0-5.0. The present invention also relates to a wet etching process for a semiconductor substrate having a SiN layer and a Si layer, the process using the wet etching composition. The composition of the present invention can be used for a substrate having a SiN layer and a Si layer to enhance removal selectivity of Si over SiN while reducing corrosion of the device and the exhaust line and air pollution caused by a volatile component generated upon use and further a burden on the environment caused by the nitrogen content contained in the composition.
(FR) La présente invention concerne une composition de gravure humide pour un substrat ayant une couche de SiN et une couche de Si, contenant 0,1 à 50 % en poids. d'un composé de fluor (A), 0,04 à 10 % en poids d'un oxydant (B), et de l'eau (D), et ayant un pH dans la plage de 2,0 à 5,0. La présente invention concerne également un procédé de gravure humide pour un substrat semiconducteur ayant une couche de SiN et une couche de Si, utilisant la composition de gravure humide. L'utilisation de la composition selon la présente invention permet une augmentation de la sélectivité de l'élimination du Si par rapport au SiN dans des substrats ayant une couche de SiN et une couche de Si, tout en réduisant la corrosion de l'équipement et des lignes d'échappement par des composants volatils produits pendant l'utilisation, la pollution de l'air et la charge environnementale de l'azote dans la composition.
Also published as:
CN108513679KR1020180087420US20190040317WO/2018/123166