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1. EP1729304 - Space management for managing high capacity nonvolatile memory

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters
Claims

1. A method of operating a digital system (10) having a host (12) coupled to at least two nonvolatile memory devices (34,36,202-208) through a controller (14), the host storing digital information in the nonvolatile memory devices and reading the stored digital information from the nonvolatile memory devices, and the memory devices being organized into blocks of sectors of information, the method steps performed by the controller for erasing digital information stored in the blocks of the nonvolatile memory devices comprising:

a. assigning a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, each block having a predetermined number of sectors;

b. forming super blocks, each super block comprising a plurality of blocks with each of the blocks of the super block positioned in like locations within the various nonvolatile memory devices;

c. identifying a particular super block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device for erasure of the particular super block wherein an address received from the host is converted to an address of the particular super block;

d. enabling the first nonvolatile memory device and issuing (442) a first erase command and an address identifying the first block to initiate an erase operation on the first block wherein the address of the particular super block is converted to a physical block address of the first block and the address identifying the first block is derived from the physical block address of the first block;

e. subsequent to issuing the first erase command and concurrent with the erase operation on the first block, increasing a value of the physical bloc address of the first block to indicate the second nonvolatile memory device, enabling the second nonvolatile memory device and issuing (442) a second erase command and an address identifying the second block to initiate an erase operation on the second block wherein a value of the address identifying the second block is the same as a value of the address identifying the first block; and

f. indicating (448) the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second blocks.


  2. A method as recited in claim 1 further including the steps of setting (438) an erase counter equal to the number of blocks within a super block and decrementing (446) the erase counter after each of the initiating steps.
  3. A method as recited in claim 2 wherein upon the value indicated by the erase counter reaching 'o', checking (458) for completion of the erasure of all of the blocks within the particular super block.
  4. A method as recited in claim 1 wherein during the indicating step, setting a Ready/Busy* signal for indicating that the nonvolatile memory unit is busy upon starting the erase operation on the first nonvolatile memory device and upon completion of the erase operation on the last nonvolatile memory device of the nonvolatile memory unit, resetting the Ready/Busy* signal for indicating that the nonvolatile memory unit is no longer busy.
  5. A method as recited in claim 1 further including the step of completing erasing of all of the selected blocks within the particular super block and thereafter verifying successful completion of the selected blocks of the particular super block.
  6. A method for use in a digital system as recited in claim 5 wherein said verifying step includes the step of issuing (452) a read status command.
  7. A method as recited in claim 1 wherein the particular super block includes more than two blocks and the method further includes the steps of selecting the more than two blocks for erasure thereof, erasing the same and upon completion of the erasure, verifying the erasure.
  8. A digital system (10) including a host (12) and at least two nonvolatile memory devices (34,36,202-208), the host being adapted for storing digital information in the nonvolatile memory devices and reading the stored digital information from the nonvolatile memory devices, the memory devices being organised into blocks of sectors of information, the digital system comprising:

a space manager circuit (28) responsive to address information from the host and operative to read, write or erase information in the nonvolatile memory devices based upon the host address information, the space manager circuit being adapted to assign a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, each block having a predetermined number of sectors, for forming super blocks, each super block having a plurality of blocks and wherein blocks of the same sequential number in each of the nonvolatile memory devices are in like position relative to each other, the space manager circuit further adapted to identify a particular super block for erasure, the particular super block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device wherein an address received from the host is converted to an address of the particular super block;

the space manager circuit being further adapted to enable the first nonvolatile memory device and to issue a first erase command and an address identifying the first block to initiate an erase operation on the first block, wherein the address of the particular super block is converted to a physical block address of the first block and the address identifying the first block is derived from the physical block address of the first block; and, subsequent to issuing the first erase command and concurrent with the erase operation on the first block, to increase a value of the physical block address of the first block to indicate the second nonvolatile memory device, to enable the second nonvolatile memory device and to issue a second erase command and an address identifying the second block to initiate an erase operation on the second block wherein a value of the address identifying the second block is the same as a value of the address identifying the first block; and

to indicate the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second blocks.


  9. A digital system as recited in claim 8 including a flag field for indicating the status of the particular super block for use in identifying the particular super block as being old and ready for erasure thereof.
  10. A digital system as recited in claim 9 further including an erase counter and means for setting the erase counter equal to the number of blocks within a super block prior to the start of the erase operation on the particular super block and decrementing the erase counter after starting erasure of the blocks of the particular super block.
  11. A digital system as recited in claim 9 wherein the space manager circuit further comprises means for first selecting the first block within the first nonvolatile memory device from the particular super block for erasure thereof and for second selecting the second block within the second nonvolatile memory device for erasure thereof.
  12. A digital system as recited in claim 8 wherein the nonvolatile memory devices are flash chips.