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1. EP1354405 - DEPOPULATED PROGRAMMABLE LOGIC ARRAY

Office
European Patent Office
Application Number 01968526
Application Date 06.09.2001
Publication Number 1354405
Publication Date 22.10.2003
Publication Kind A2
IPC
H03K 19/177
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
02using specified components
173using elementary logic circuits as components
177arranged in matrix form
H01L 21/82
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
H03K 19/177
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
02using specified components
173using elementary logic circuits as components
177arranged in matrix form
CPC
H03K 19/17708
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output
02using specified components
173using elementary logic circuits as components
177arranged in matrix form
17704the logic functions being realised by the interconnection of rows and columns
17708using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Applicants LIGHTSPEED SEMICONDUCTOR CORP
Inventors OSANN ROBERT
HALLINAN PATRICK
LEE JUNG
MUKUND SHRIDHAR
Designated States
Priority Data 0127543 06.09.2001 US
23105900 08.09.2000 US
09827015 05.04.2001 US
Title
(DE) VEREINFACHTES PROGRAMMIERBARES LOGISCHES FELD
(EN) DEPOPULATED PROGRAMMABLE LOGIC ARRAY
(FR) RESEAU LOGIQUE PROGRAMMABLE APPAUVRI
Abstract
(EN)
A programmable logic array (PLA) in accordance with the invention achieves a maximum amount of depopulation of programmable connections while sill implementing a logic function and maintaining flexibility for future reprogramming. In addition, a PLA in accordance with the invention can be built so that no matter what functionality is programmed, performance characteristics for the device are maintained. Further, a PLA in accordance with the invention does not require a regular array structure.

(FR)
Selon la présente invention, un réseau logique programmable réalise une quantité maximale d'appauvrissement de connexions programmables, tandis qu'il continue de mettre en oeuvre une fonction logique et à maintenir la flexibilité d'une reprogrammation à venir. En outre, on peut, selon l'invention, élaborer un réseau logique programmable, de telle manière que quelque que soit la fonctionnalité programmée, on maintient les caractéristiques d'efficacité du dispositif. Par ailleurs, un réseau logique programmable décrit dans cette invention ne nécessite par d'une structure de réseau standard.