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1. EP0804784 - DIGITAL DRIVING OF MATRIX DISPLAY DRIVER

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters
Claims

1. A digital display driver for producing analog signal levels for application to a data line of a matrix display apparatus, the signal levels being produced in response to successively-presented, respective digital data codes representative of said signal levels, said driver comprising:

a. storage means (10) for successively storing the digital data codes, each of said codes having at least a first bit and at least a second bit;

b. conversion means (20) coupled to the storage means for, during a first time interval, producing a first analog signal level having a magnitude represented by at least the first bit of a stored code and for, during a second time interval, producing a second analog signal level having a magnitude represented by the at least the second bit of said stored code;

c. capacitive means having a first electrode coupled to an output of the driver; and

d. coupling means (T8, T9) for coupling the conversion means to the capacitive means and for:

(1) during the first time interval, effecting charging of the capacitive means to a voltage determined by the first analog signal level; and

(2) during the second time interval, effecting shifting of the first electrode voltage by a magnitude determined by the second analog signal level.


  2. A digital display driver as in claim 1, characterized in that the first bit is a more-significant bit and the second bit is a less-significant bit.
  3. A digital display driver as in claim 1 where the capacitive means comprises a capacitor (C1) having the first electrode and a second electrode, said coupling means cooperating with the conversion means to produce said voltage shift by:

a. coupling the second electrode to a means for providing a reference potential during the first time interval; and

b. coupling said second electrode to the conversion means when it is producing the second analog signal level during the second time interval.


  4. A digital display driver as in claim 1 where the capacitive means comprises a first capacitor, having the first electrode, and a second capacitor, said coupling means cooperating with the conversion means to produce said voltage shift by:

a. coupling the first capacitor to the conversion means, during the first time interval, to effect charging of said first capacitor to the voltage determined by the first analog signal level; and

b. coupling a voltage divider comprising the first and second capacitors to the conversion means, during the second time interval, to effect charging of the first capacitor to a voltage which is the sum of:

(1) the voltage determined by the first analog signal level; and

(2) a voltage which is a predetermined fraction of the voltage determined by the second analog signal level.


  5. A digital display driver as in claim 4 where the predetermined fraction is substantially equal to 2 -N/2, where N equals the number of bits in each data code.
  6. A digital display driver as in claim 2 where the at least one more significant bit includes the most significant bit.
  7. A digital display driver as in claim 2 where the at least one less-significant bit includes the least significant bit.
  8. A method of producing, at an output of a digital display driver, analog signal levels for application to a data line of a matrix display apparatus, the signal levels being produced in response to successively-presented, respective digital data codes representative of said signal levels, said method comprising:

a. storing the digital data codes, each of said codes having at least a first bit and at least a second bit;

b. during a first time interval, producing a first analog signal level having a magnitude represented by the at least one more-significant bit of a stored code;

c. during a second time interval, producing a second analog signal level having a magnitude represented by the at least one less-significant bit of said stored code;

d. during the first time interval, effecting charging of capacitive means, having a first electrode coupled to the output, to a voltage determined by the first analog signal level; and

e. during the second time interval, effecting shifting of the first electrode voltage by a magnitude determined by the second analog signal level.


  9. A method as in claim 8 where the capacitive means comprises a capacitor having the first electrode and a second electrode, said voltage shift being produced by:

a. coupling the second electrode to a means for providing a reference potential during the first time interval; and

b. coupling said second electrode to means for producing the second analog signal level during the second time interval.


  10. A method as in claim 8 where the capacitive means comprises a first capacitor, having the first electrode, and a second capacitor, said voltage shift being produced by:

a. coupling the first capacitor to means for producing the first analog signal level during the first time interval; and

b. coupling a voltage divider comprising the first and second capacitors to means for producing the second analog signal level, during the second time interval, to effect charging of the first capacitor to a voltage which is the sum of:

(1) the voltage determined by the first analog signal level; and

(2) a voltage which is a predetermined fraction of the voltage determined by the second analog signal level.


  11. A method as in claim 10 where the predetermined fraction is substantially equal to 2 -N/2, where N equals the number of bits in each data code.
  12. A display apparatus comprising:

a matrix display having data lines and selection lines, and

a digital display driver as in claim 1.