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1. EP0775352 - SINGLE CENTRALISED MEMORY ARCHITECTURE FOR VIDEO IMAGE TRANSFER

Office European Patent Office
Application Number 96922076
Application Date 07.06.1996
Publication Number 0775352
Publication Date 28.05.1997
Publication Kind A1
IPC
G06F 3/14
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
14Digital output to display device
G09G 1/16
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
1Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators
06using single beam tubes
14the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
16the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
G06F 13/36
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
36for access to common bus or bus system
G06T 1/60
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
1General purpose image data processing
60Memory management
G09G 5/00
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
G09G 5/36
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
CPC
G09G 5/39
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
G06T 1/60
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
1General purpose image data processing
60Memory management
G09G 5/36
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
G09G 2340/10
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2340Aspects of display data processing
10Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
Applicants THOMSON BROADCAST SYSTEMS
Inventors BOURRE THIERRY
LABRANCHE PATRICK
REBIAI MOHAMED
BRUHAT PATRICE
Designated States
Priority Data 9506752 08.06.1995 FR
9600863 07.06.1996 FR
Title
(DE) ARCHITEKTUR MIT ZENTRALISIERTEM EINZELSPEICHER ZUR ÜBERTRAGUNG VON VIDEOBILDERN
(EN) SINGLE CENTRALISED MEMORY ARCHITECTURE FOR VIDEO IMAGE TRANSFER
(FR) ARCHITECTURE A MEMOIRE UNIQUE CENTRALISEE POUR LE TRANSFERT D'IMAGES VIDEO
Abstract
(EN)
An architecture for storing and transferring still or animated video images is disclosed. Said architecture includes at least one input circuit (E1, E2, ..., En) for video image data access, a memory area (M) for storing video images, at least one video image output circuit (S1, S2, ..., Sj) and a video bus (B) for transferring data between the memory area (M), the input circuit and the output circuit. Said memory area (M) is a working area and the width (L) of the video bus (B) is no smaller than that of the memory area (M). The working area is under the centralised control of a control circuit (CTRL). Said architecture may be used in dedicated computer platforms for transferring broadcast-quality images, or in video devices for computer-generated image animation. Said architecture may further include video image processing circuits (T1, T2, ..., Tn).

(FR)
L'invention concerne une architecture permettant de stocker et de transférer des images vidéo fixes ou animées, ladite architecture comprenant au moins un circuit d'entrée (E1, E2, ..., En) permettant l'accès de données destinées à composer des images vidéo, une zone mémoire (M) permettant de stocker des images vidéo, au moins un circuit de sortie (S1, S2, ...., Sj) d'images vidéo et un bus vidéo (B) destiné à assurer le transfert d'informations entre la zone mémoire (M), le circuit d'entrée et le circuit de sortie, caractérisé en ce que la zone mémoire (M) est une mémoire banalisée et en ce que le bus vidéo (B) a une largeur L supérieure ou égale à la largeur de la zone mémoire (M). La mémoire banalisée est commandée de façon centralisée par un circuit de contrôle (CTRL). L'invention s'applique aux plates-formes informatiques dédiées au transfert d'images de qualité Broadcast ou encore aux dispositifs vidéo pour animation d'images de synthèse. L'architecture selon l'invention peut aussi comprendre des circuits de traitement (T1, T2, ..., Tn) des images vidéo.