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1. CN103189911 - 描绘装置以及描绘方法

Office China
Application Number 201180052422.8
Application Date 27.01.2011
Publication Number 103189911
Publication Date 03.07.2013
Grant Number 103189911
Grant Date 06.07.2016
Publication Kind B
IPC
G09G 5/39
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
G09G 3/20
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
G09G 5/00
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
G09G 5/393
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of individual graphic patterns using a bit-mapped memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
CPC
G09G 3/3611
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
34by control of light from an independent source
36using liquid crystals
3611Control of matrices with row and column drivers
G09G 5/393
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
5Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
36characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
39Control of the bit-mapped memory
393Arrangements for updating the contents of the bit-mapped memory
G09G 2360/127
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2360Aspects of the architecture of display systems
12Frame memory handling
127Updating a frame memory using a transfer of data from a source area to a destination area
Applicants 三菱电机株式会社
Inventors 中田成宪
久代纪之
胜仓真
小泉吉秋
Agents 中国国际贸易促进委员会专利商标事务所 11038
Priority Data 2010-245743 01.11.2010 JP
Title
(ZH) 描绘装置以及描绘方法
Abstract
(ZH)
DMA控制器(13A)与CPU(10)独立地动作,将存储于ROM(11)的图像数据从其开头的读出开始位置以规定的单位依次读出而写入缓冲器(30)。DMA控制器(13B)与CPU(10)独立地动作,将读出到了缓冲器(30)的数据从VRAM(15)中的写入开始位置逐个字节横向依次写入。辅助芯片(3)的控制部(31)每当各行的数据列的写入完成时,将VRAM(15)中的写入开始位置更新为接下来的行的相同的列的位置。