Search International and National Patent Collections
Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (CN102292712) Logical address offset

Office : China
Application Number: 201080005160.5 Application Date: 15.01.2010
Publication Number: 102292712 Publication Date: 21.12.2011
Publication Kind : A
Prior PCT appl.: Application Number:PCTUS2010000095 ; Publication Number:2010090696 Click to see the data
IPC:
G06F 12/02
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
CPC:
G06F 12/06
G06F 3/0608
G06F 3/0638
G06F 3/0679
G06F 12/0246
G06F 2212/7202
Applicants: Micron Technology Inc.
美光科技公司
Inventors: Asnaashari Mehdi
迈赫迪·阿斯纳阿沙里
Benson William E.
威廉·E·本森
Agents: song xiantao
北京律盟知识产权代理有限责任公司 11287
Priority Data: 12356765 21.01.2009 US
Title: (EN) Logical address offset
(ZH) 逻辑地址偏移
Abstract: front page image
(EN) The present disclosure includes methods, devices, and systems for a logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to detecting the formatting operation, the method includes inspecting format information on the memory unit, calculating a logical address offset, and applying the offset to a host logical address.
(ZH)

本发明包含用于逻辑地址偏移的方法、装置及系统。一个方法实施例包含检测存储器单元格式化操作。随后,响应于检测到所述格式化操作,所述方法包含检查关于所述存储器单元的格式信息、计算逻辑地址偏移及将所述偏移施加到主机逻辑地址。


Also published as:
EP2382547JP2012515954KR1020110107856KR1020140016430CN107273058WO/2010/090696