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1. CN101405865 - Strained silicon with elastic edge relaxation

Office China
Application Number 200780009566.9
Application Date 12.03.2007
Publication Number 101405865
Publication Date 08.04.2009
Grant Number 101405865
Grant Date 04.01.2012
Publication Kind B
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
16
including, apart from doping materials or other impurities, only elements of the fourth group of the Periodic System in uncombined form
161
including two or more of the elements provided for in group H01L29/1688
165
in different semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H01L 29/10
H01L 29/165
H01L 21/336
CPC
H01L 29/7846
H01L 29/1054
H01L 29/165
H01L 29/66636
Applicants Acorn Technologies Inc.
艾康技术公司
Inventors Clifton Paul A.
保罗·A·克利夫顿
Agents cai shengwei gu jinwei
北京集佳知识产权代理有限公司 11227
北京集佳知识产权代理有限公司 11227
Priority Data 11378730 17.03.2006 US
Title
(EN) Strained silicon with elastic edge relaxation
(ZH) 半导体器件及其制造方法
Abstract
(EN)
A thin blanket epitaxial layer of SiGe is grown on a silicon substrate to have a biaxial compressive stress in the growth plane. A thin epitaxial layer of silicon is deposited on the SiGe layer, with the SiGe layer having a thickness less than its critical thicknesses. Shallow trenches are subsequently fabricated through the epitaxial layers, so that the strain energy is redistributed such that the compressive strain in the SiGe layer is partially relaxed elastically and a degree of tensile strain is induced to the neighboring layers of silicon. Because this process for inducing tensile strain in a silicon over-layer is elastic in nature, the desired strain may be achieved without formation of misfit dislocations.

(ZH)

在硅衬底上生长薄的SiGe覆盖外延层以在生长平面内具有双轴压应力。在所述SiGe层上沉积薄的硅外延层,所述SiGe层的厚度小于其临界厚度。随后通过所述外延层制造浅沟槽,从而应变能重新分布,使得在所述SiGe层中的压应变发生部分弹性弛豫并且将一定程度的拉伸应变引入相邻的硅层。由于在硅覆盖层中引起拉伸应变的该工艺在本质上是弹性的,所以可以达到期望的应变而不形成失配位错。