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1. (CN101278400) Semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer

Office : China
Application Number: 200680023749.1 Application Date: 30.06.2006
Publication Number: 101278400 Publication Date: 01.10.2008
Publication Kind : A
Prior PCT appl.: Application Number:PCTUS2006026029 ; Publication Number:2007005862 Click to see the data
IPC:
H01L 29/15
H01L 29/04
H01L 29/786
H01L 29/10
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
15
Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
04
characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
10
with semiconductor regions connected to an electrode not carrying current to be rectified, amplified, or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
CPC:
H01L 29/78696
B82Y 10/00
H01L 29/04
H01L 29/1054
H01L 29/151
H01L 29/78681
Applicants: Rj Mears LLC
梅尔斯科技公司
Inventors: Rao Kalipatnam V.
卡里帕特纳姆·V·劳
Agents: qinchen
中国国际贸易促进委员会专利商标事务所
Priority Data: 60/695,588 30.06.2005 US
Title: (EN) Semiconductor device having a semiconductor-on-insulator (SOI) configuration and including a superlattice on a thin semiconductor layer
(ZH) 具有绝缘体上半导体(SOI)构造且在薄半导体层上包含超晶格的半导体器件及相关方法
Abstract: front page image
(EN) A semiconductor device may include a substrate, an insulating layer on the substrate, and a semiconductor layer on the insulating layer on a side thereof opposite the substrate. The semiconductor device may further include a superlattice on the semiconductor layer on a side thereof opposite the insulating layer. The superlattice may include a plurality of stacked groups of layers, with each group comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer thereon. The at least one non-semiconductor monolayer may be constrained within a crystal lattice of adjacent base semiconductor portions.
(ZH)

一种半导体器件,可以包括基片、位于基片上的绝缘层和位于与基片相对的绝缘层的一侧上的半导体层。该半导体器件还包括位于与绝缘层相对的半导体层的一侧上的超晶格。该超晶格可以包括多个叠加的层组,其中的每一组包括限定基础半导体部分的多个叠加的基础半导体单层和在其上的至少一个非半导体单层。所述至少一个非半导体单层被限制于相邻基础半导体部分的晶格内。


Also published as:
EP1920466JP2008544581CA2612243AU2006265096WO/2007/005862