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1. (CN101208754) Semiconductor device and method for controlling the same

Office : China
Application Number: 200580050283.X Application Date: 28.06.2005
Publication Number: 101208754 Publication Date: 25.06.2008
Grant Number: 101208754 Grant Date: 02.02.2011
Publication Kind : B
Prior PCT appl.: Application Number:PCTJP2005011815 ; Publication Number:2007000809 Click to see the data
IPC:
G11C 16/28
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
26
Sensing or reading circuits; Data output circuits
28
using differential sensing or reference cells, e.g. dummy cells
CPC:
H01L 27/1052
G11C 16/0466
G11C 16/28
Applicants: Spansion LLC
斯班逊有限公司
斯班逊日本有限公司
Inventors: Kogawa Akatsuki
小川晓
Yano Masaru
矢野胜
Agents: gebo
北京戈程知识产权代理有限公司 11314
Priority Data:
Title: (EN) Semiconductor device and method for controlling the same
(ZH) 半导体器件及其控制方法
Abstract: front page image
(EN) The present invention provides a semiconductor memory and a control method therefor, the semiconductor device including a first current-voltage conversion circuit ( 16 ) connected to a core cell ( 12 ) provided in a nonvolatile memory cell array ( 10 ), a second current-voltage conversion circuit ( 26 ) connected to a reference cell ( 22 ) through a reference cell data line ( 24 ), a sense amplifier ( 18 ) sensing an output from the first current-voltage conversion circuit and an output from the second current-voltage conversion circuit, a compare circuit ( 28 ) comparing a voltage level at the reference cell data line with a predefined voltage level, and a charging circuit ( 30 ) charging the reference cell data line, if the voltage level at the reference cell data line is lower than the predefined voltage level during pre-charging the reference cell data line. According to the present invention, the pre-charging period of the reference cell data line can be shortened, and the data read time can be shortened.
(ZH)

本发明涉及一种半导体器件及其控制方法,该半导体具备:第一电流电压转换电路(16),连接于非易失性存储器单元阵列(10)内设置的核心单元(12);第二电流电压转换电路(26),通过参考单元数据线(24)连接参考单元(22);感测放大器(18),感测第一电流电压转换电路的输出与第二电流电压转换电路的输出;比较电路(28),比较参考单元数据线的电压值与既定电压值;以及充电电路(30),在参考单元数据线的预充电时,当参考单元数据线的电压值比既定电压值还低时,对参考单元数据线进行充电。依据本发明,能够缩短参考单元数据线的预充电时间,而能够缩短数据读取时间。


Also published as:
KR1020080021712EP1909289US20070002639US20110182116JP4922932WO/2007/000809