(EN)
A flash memory chip that can be switched into four different read modes is described. And computer system employing same is also discribed. In asynchronous flash mode, the flash memory is read as a standard flash memory. In synchronous flash mode, a clock signal is provided to the flash chip and a series of addresses belonging to a data burst are specified, one address per clock period. The data stored at the specified addresses are output sequentially during subsequent clock periods. In asynchronous DRAM mode, the flash memory emulates DRAM. In synchronous DRAM mode the flash memory emulates synchronous DRAM.
(ZH) 描述了可被切换至4种不同的读出方式的快速存储器芯片(320)。还描述了利用了这些方式的计算机系统(100、200、300、800、1300、1500)和体系。在第一种读出方式即异步快速方式中，快速存储器(130)被作为标准快速存储器读出。在第二种方式即同步快速方式中，向快速存储器芯片(320)提供时钟信号和每时钟信号一个地址地指定属于一数据串的一系列地址。在第三种方式即异步DRAM(动态随机存取存储器)方式中，快速存储器(130)模拟DRAM。在第四种读出方式即同步DRAM方式中，组合第二和第三种方式的特点，得到模拟同步DRAM的快速存储器。