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1. CN112052213 - Enhanced SPI controller and method for operating SPI controller

Office
China
Application Number 202011078754.0
Application Date 10.10.2020
Publication Number 112052213
Publication Date 08.12.2020
Publication Kind A
IPC
G06F 13/42
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
38Information transfer, e.g. on bus
42Bus transfer protocol, e.g. handshake; Synchronisation
G06F 13/28
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
20for access to input/output bus
28using burst mode transfer, e.g. direct memory access, cycle steal
CPC
G06F 13/4282
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
38Information transfer, e.g. on bus
42Bus transfer protocol, e.g. handshake; Synchronisation
4282on a serial bus, e.g. I2C bus, SPI bus
G06F 13/287
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
20for access to input/output bus
28using burst mode transfer, e.g. direct memory access ; DMA; , cycle steal
287Multiplexed DMA
G06F 2213/0002
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2213Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
0002Serial port, e.g. RS232C
G06F 2213/2804
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2213Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
28DMA
2804Systems and methods for controlling the DMA frequency on an access bus
Applicants ESPRESSIF SYSTEMS (SHANGHAI) CO., LTD.
乐鑫信息科技(上海)股份有限公司
Inventors WU CHENG'EN
吴承恩
YELLEN DOMBURG
耶伦·多姆堡
XIAO XUFENG
萧旭峯
Agents 北京市路盛律师事务所 11326
北京市路盛律师事务所 11326
Title
(EN) Enhanced SPI controller and method for operating SPI controller
(ZH) 增强型SPI控制器以及操作SPI控制器的方法
Abstract
(EN) The present invention discloses an SPI controller and a method for operating the SPI controller. The SPI controller comprises: an SPI clock signal generator configured to generate an SPI clock signal;a register set configured to store the SPI working configuration of the SPI controller; a plurality of SPI pins configured to be connected to one or more SPI peripherals; an input and output controller configured to execute data input or output between the SPI controller and the SPI peripheral according to the SPI clock signal and the SPI working configuration; and an SPI state machine configuredto control the working state of the SPI controller, wherein the SPI controller is electrically coupled to a CPU, a DMA controller and a system memory which are located outside the SPI controller through a bus, and the input and output controller is further configured to receive the updated SPI work configuration from the DMA controller and update the updated SPI work configuration into the register set between two consecutive SPI transmissions.
(ZH) 本发明公开了一种SPI控制器和操作SPI控制器的方法,该SPI控制器包括:SPI时钟信号产生器,其配置为产生SPI时钟信号;寄存器组,其配置为保存所述SPI控制器的SPI工作配置;多个SPI引脚,其配置为连接到一个或多个SPI外设;及输入输出控制器,其配置为根据所述SPI时钟信号及所述SPI工作配置,执行所述SPI控制器与所述SPI外设之间的数据输入或输出;SPI状态机,其配置为控制所述SPI控制器的工作状态;其中所述SPI控制器通过总线电耦合到位于所述SPI控制器外部的CPU、DMA控制器及系统内存;及所述输入输出控制器还配置为在连续的两次SPI传输之间,从所述DMA控制器接收更新的SPI工作配置并将所述更新的SPI工作配置更新到所述寄存器组中。
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