Processing

Please wait...

Settings

Settings

Goto Application

1. CN111786894 - FPGA device for realizing on-chip network transmission bandwidth expansion function

Office
China
Application Number 202010622784.7
Application Date 01.07.2020
Publication Number 111786894
Publication Date 16.10.2020
Grant Number 111786894
Grant Date 10.08.2021
Publication Kind B
IPC
H04L 12/775
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
70Packet switching systems
701Routing or path finding
771Router architecture
775multiple routing entities, e.g. multiple software or hardware instances
H04L 12/933
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
70Packet switching systems
931Switch fabric architecture
933Switch core, e.g. crossbar, shared memory or shared medium
CPC
H04L 45/583
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
45Routing or path finding of packets in data switching networks
58Association of routers
583Stackable routers
H04L 49/109
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
49Packet switching elements
10Switching fabric construction
109integrated on microchip, e.g. switch-on-chip
Applicants WUXI ZHONGWEI YIXIN CO., LTD.
无锡中微亿芯有限公司
Inventors XU YANFENG
徐彦峰
SHAN YUE'ER
单悦尔
FAN JICONG
范继聪
ZHANG YANFEI
张艳飞
YAN HUA
闫华
Agents 无锡华源专利商标事务所(普通合伙) 32228
无锡华源专利商标事务所(普通合伙) 32228
Title
(EN) FPGA device for realizing on-chip network transmission bandwidth expansion function
(ZH) 实现片上网络传输带宽扩充功能的FPGA装置
Abstract
(EN) The invention discloses an FPGA device for realizing an on-chip network transmission bandwidth expansion function, relating to the technical field of FPGA. When a predetermined function module with abuilt-in hard core IP node is integrated in a FPGA bare chip, a soft-core IP node and a hard-core IP node are formed by utilizing logic resource module configuration in the FPGA bare chip and are connected to form an NOC network structure, so that the addition of nodes is achieved, and transmission bandwidth of the predetermined function module can be expanded; the soft core IP node can be additionally connected to the input and output signals in the predetermined function module, and the transmission bandwidth of the predetermined function module can be expanded. Furthermore, the FPGA devicealso comprises a silicon connection layer in which a silicon connection layer NOC network is arranged, so that nodes in the FPGA bare chip can be connected to the silicon connection layer to form a larger NOC structure, the increase of the nodes is further realized, and the transmission bandwidth of a predetermined function module is expanded.
(ZH) 本申请公开了一种实现片上网络传输带宽扩充功能的FPGA装置,涉及FPGA技术领域,当FPGA裸片内部集成内建有硬核IP节点的预定功能模块时,利用FPGA裸片内部的逻辑资源模块配置形成软核IP节点与硬核IP节点相连形成NOC网络结构,实现节点的增加,可以扩充预定功能模块的传输带宽,另一方面,软核IP节点可以额外连接到预定功能模块中的输入输出信号,也可以扩充预定功能模块的传输带宽。进一步,该FPGA装置还包括内部布设有硅连接层NOC网络的硅连接层,使得FPGA裸片内部的节点可以连接到硅连接层构成更大的NOC结构,进一步实现节点的增加并扩充预定功能模块的传输带宽。
Related patent documents