(EN) The invention relates to an array substrate, a display panel and a display device, and belongs to the field of displays. The array substrate comprises: a substrate base plate which is provided with adisplay area and a peripheral area surrounding the display area; a plurality of clock lines, which are located on the substrate and in the peripheral area and extend in the first direction; a plurality of clock leads which are positioned on the substrate and in the peripheral area and extend along a second direction, and the first direction and the second direction being crossed; a plurality of shift register units, which are located on the substrate and in the peripheral area, and the shift register units and the clock lines are connected through clock leads; a compensation capacitor polar plate which is located on the substrate and is connected with the clock lead in the peripheral area, wherein the compensation capacitor polar plate and the clock lead are in different layers, and the area of the compensation capacitor polar plate is in negative correlation with the length of the connected clock lead.
(ZH) 本公开是关于一种阵列基板、显示面板和显示装置，属于显示器领域。阵列基板包括：衬底基板，具有显示区域和围绕显示区域的外围区域；多根时钟线，位于衬底基板上且在外围区域内，时钟线沿第一方向延伸；多根时钟引线，位于衬底基板上且在外围区域内，时钟引线沿第二方向延伸，第一方向和第二方向交叉；多个移位寄存器单元，位于衬底基板上且在外围区域内，移位寄存器单元和时钟线之间通过时钟引线连接；补偿电容极板，位于衬底基板上且在外围区域内，补偿电容极板和时钟引线连接，且补偿电容极板与时钟引线不同层，补偿电容极板的面积和所连的时钟引线的长度负相关。
