(EN) Systems and methods for adjusting a phase step size of a clock data recover (CDR) circuit are described according to aspects of the present disclosure. In certain aspects, a method for adjusting a phase step size of a CDR circuit includes sensing a frequency offset of the CDR circuit, and adjusting the phase step size of the CDR circuit based on the sensed frequency offset. The frequency offset may be sensed by sensing a signal level on an integration path of a loop filter of the CDR circuit. The phase step size of the CDR circuit may be adjusted by switching the CDR circuit between a first phase step size and a second phase step size using a modulator (e.g., a sigma-delta modulator).
(ZH) 根据本公开的方面，描述了用于调整时钟数据恢复(CDR)电路的相位步长的系统和方法。在某些方面，一种用于调整CDR电路的相位步长的方法包括：感测CDR电路的频率偏移，以及基于所感测的频率偏移来调整CDR电路的相位步长。可以通过感测CDR电路的环路滤波器的积分路径上的信号水平来感测频率偏移。可以通过使用调制器(例如，sigma‑delta调制器)在第一相位步长和第二相位步长之间切换CDR电路来调整CDR电路的相位步长。
