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1. CN109558373 - A high-efficiency fusion server architecture

Office China
Application Number 201811465942.1
Application Date 03.12.2018
Publication Number 109558373
Publication Date 02.04.2019
Publication Kind A
IPC
G06F 15/78
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general; Data processing equipment in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
CPC
G06F 15/78
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
G06F 15/7839
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
7839with memory
G06F 2015/766
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
761Indexing scheme relating to architectures of general purpose stored programme computers
766Flash EPROM
Applicants JINAN INSPUR HI-TECH INVESTMENT AND DEVELOPMENT CO., LTD.
济南浪潮高新科技投资发展有限公司
Inventors JIANG KAI
姜凯
YU ZHILOU
于治楼
HAO HONG
郝虹
LI PENG
李朋
Agents 济南信达专利事务所有限公司 37100
Title
(EN) A high-efficiency fusion server architecture
(ZH) 一种高效能融合服务器架构
Abstract
(EN)
The invention particularly relates to a high-efficiency fusion server architecture. The high-efficiency fusion server architecture adopts a heterogeneous architecture of a universal processor and double FPGA chips, realizes high-efficiency fusion of a network, calculation and storage, and comprises a universal processor, an FPGA 1 chip, an FPGA 2 chip, a local memory, a memory array, a flash memory array and an FPGA local memory, wherein the FPGA 1, the FPGA 2 chip and the local memory are both connected to the universal processor, the memory array and the flash memory array are both connectedto the FPGA 1 chip, the FPGA local memory is connected to the FPGA 2 chip, and the FPGA 1 chip and the FPGA 2 chip are connected through a data bus. According to the high-efficiency fusion server architecture, a heterogeneous architecture of a universal processor and double FPGA chips is adopted, the flexibility is high, the energy consumption is low, the fault-tolerant characteristic is high, fusion of calculation, storage and a network is achieved, and the cloud application efficiency is greatly improved.

(ZH)
本发明特别涉及一种高效能融合服务器架构。该高效能融合服务器架构,采用通用处理器+双FPGA芯片的异构架构,将网络,计算和存储实现高效融合,包括通用处理器,FPGA 1芯片,FPGA 2芯片,本地内存,内存阵列,闪存阵列和FPGA本地内存;所述FPGA 1芯片,FPGA 2芯片与本地内存均连接到通用处理器,所述内存阵列和闪存阵列均连接到FPGA 1芯片,所述FPGA本地内存连接到FPGA 2芯片,所述FPGA 1芯片与FPGA 2芯片之间通过数据总线相连接。该高效能融合服务器架构,采用通用处理器+双FPGA芯片的异构架构,灵活性高,能耗低,容错特性强,实现了计算,存储与网络的融合,极大地提升了云应用效率。

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