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1. CN109286463 - FPGA-based high-precision time measurement method

Office China
Application Number 201811477521.0
Application Date 05.12.2018
Publication Number 109286463
Publication Date 29.01.2019
Publication Kind A
IPC
H04J 3/06
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
JMULTIPLEX COMMUNICATION
3Time-division multiplex systems
02Details
06Synchronising arrangements
CPC
H04J 3/0638
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
JMULTIPLEX COMMUNICATION
3Time-division multiplex systems
02Details
06Synchronising arrangements
0635Clock or time synchronisation in a network
0638Clock or time synchronisation among nodes; Internode synchronisation
H04J 3/0682
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
JMULTIPLEX COMMUNICATION
3Time-division multiplex systems
02Details
06Synchronising arrangements
0635Clock or time synchronisation in a network
0682by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
Applicants BEIJING ZHONGCHUANGWEI NANJING QUANTUM COMMUNICATION TECHNOLOGY CO., LTD.
北京中创为南京量子通信技术有限公司
Inventors XU XIUFENG
徐修峰
LI ZHEN
李镇
Agents 南京纵横知识产权代理有限公司 32224
Title
(EN) FPGA-based high-precision time measurement method
(ZH) 一种基于FPGA的高精度时间测量方法
Abstract
(EN)
The invention provides an FPGA-based high-precision time measurement method. The method comprises steps: the output values of all carry chains of Start signals are subjected to summation operation, and the number S1 of the Start signals passing through the carry chains is further obtained; according to the S1, time is calculated: T1= S1*tau; the output values of all carry chains of Stop signals are subjected to summation operation, and the number S2 of the Stop signals passing through the carry chains is further obtained; according to the S2, time is calculated: T2= S2*tau; according to the time T1 and the time T2, a measurement result is outputted: T= T1+nTp+(Tp-T2). Thus, by summing the output values of all carry chains, even if unstable factors appear during a signal transmission process and 1 and 0 alternately appear, after summation operation, a carry chain with 1 is also calculated, the calculated signal passing carry chain position is closer to the actual passing carry chain position, and the measured time precision is further improved.

(ZH)
本申请提供一种基于FPGA的高精度时间测量方法,包括:将Start信号的所有进位链的输出值进行求和运算,从而得到Start信号的走过进位链的个数S1;根据S1,计算时间T1=S1*τ;将Stop信号的所有进位链的输出值进行求和运算,从而得到Stop信号的走过进位链的个数S2;根据S2,计算时间T2=S2*τ;根据时间T1以及时间T2,输出测量结果T=T1+nTp+(Tp‑T2)。因此,通过将所有进位链的输出值进行求和运算,这样即使信号的传输过程中出现不稳定因素,出现1和0交替出现的情况,经过求和运算后,将其中出现1的进位链计算进去,从而使得计算的信号走过的进位链位置更加贴近实际走过的进位链位置,从而提高测量的时间精度。

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