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1. (CN107273058) Logical Address Offset

Office : China
Application Number: 201710540513.5 Application Date: 15.01.2010
Publication Number: 107273058 Publication Date: 20.10.2017
Grant Number: 107273058 Grant Date: 18.06.2019
Publication Kind : B
IPC:
G06F 3/06
G06F 12/02
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
CPC:
G06F 12/06
G06F 3/0608
G06F 3/0638
G06F 3/0679
G06F 12/0246
G06F 2212/7202
Applicants: MICRON TECHNOLOGY INC.
美光科技公司
Inventors: ASNAASHARI MEHDI
迈赫迪·阿斯纳阿沙里
BENSON WILLIAM
威廉·E·本森
Agents: 北京律盟知识产权代理有限责任公司 11287
Priority Data: 12/356,765 21.01.2009 US
Title: (EN) Logical Address Offset
(ZH) 逻辑地址偏移
Abstract: front page image
(EN) The present disclosure includes methods, devices, and systems for the logical address offset. One method embodiment includes detecting a memory unit formatting operation. Subsequently, in response to detecting the formatting operation, the method includes inspecting format information on the memory unit, calculating a logical address offset, and applying the offset to a host logical address.
(ZH) 本发明包含用于逻辑地址偏移的方法、装置及系统。一个方法实施例包含检测存储器单元格式化操作。随后,响应于检测到所述格式化操作,所述方法包含检查关于所述存储器单元的格式信息、计算逻辑地址偏移及将所述偏移施加到主机逻辑地址。
Also published as:
EP2382547JP2012515954CN102292712KR1020110107856KR1020140016430WO/2010/090696