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1. AU2002214538 - System and method for single pin reset in a mixed signal integrated circuit

Office
Australia
Application Number 2002214538
Application Date 13.09.2001
Publication Number 2002214538
Publication Date 21.02.2002
Publication Kind A
IPC
H04N 5/14
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
14Picture signal circuitry for video frequency region
H04N 5/44
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
44Receiver circuitry
H04N 5/46
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
44Receiver circuitry
46for receiving on more than one standard at will
H04N 5/04
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
04Synchronising
H04N 5/12
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
NPICTORIAL COMMUNICATION, e.g. TELEVISION
5Details of television systems
04Synchronising
12Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
Applicants Thomson Licensing S.A.
Inventors Albean, David Lawrence
Priority Data 09666021 19.09.2000 US
Title
(EN) System and method for single pin reset in a mixed signal integrated circuit
Abstract
(EN)
A system and method is described for providing a single pin reset for a mixed signal integrated circuit. The system and method provides for a single reset signal/pin of the integrated circuit to be utilized to generate all internal resets for the analog and digital circuitry/sections of the mixed signal integrated circuit. In one form, a state machine generates a reset signal for a phase locked loop synthesizer that is utilized to generate internal system clocks for the analog and digital circuitry, as well as a digital reset signal that provides reset signals to the various digital sections circuitry of the integrated circuit. Preferably, the chip reset signal is provided for a longer period of time than the PLL reset signal in order to assure that the PLL is running and generating clocking signals before the digital logic is clocked.