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1. (AU1996075514) Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer

Office : Australia
Application Number: 75514/96 Application Date: 31.10.1996
Publication Number: 1996075514 Publication Date: 31.07.1997
Publication Kind : A
Prior PCT appl.: Application Number:US1996017550 ; Publication Number: Click to see the data
IPC:
G06F 3/06
G06F 9/445
G06F 11/20
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
44
Arrangements for executing specific programmes
445
Programme loading or initiating
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
16
Error detection or correction of the data by redundancy in hardware
20
using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
CPC:
G06F 11/0727
G06F 3/0601
G06F 9/4411
G06F 11/0766
G06F 2003/0697
Applicants: Intersect Technologies, Inc.
Inventors: Cornaby, Stephen R.
Harmer, Tracy D.
Priority Data: 553024 03.11.1995 US
Title: (EN) Method and arrangement for operating a mass memory storage peripheral computer device connected to a host computer
Abstract:
(EN) An arrangement and method are disclosed herein for operating a mass memory storage peripheral computer device connected to a host computer. The host computer has system RAM associated with the host computer and is operated using an operating system and a system BIOS. The mass memory storage peripheral computer device is connected to the host computer using a peripheral bus in which relocatable expansion BIOS location addresses are allowed. The arrangement and method include a loadable device driver for controlling the operation of the mass memory storage peripheral computer device during the operation of the computer system. During the start-up of the computer system, the loadable device driver is loaded into the system RAM for use during the operation of the system. The loadable device driver allows the host computer to communicate with and control the operation of the mass memory storage peripheral computer device in a way which does not require the system BIOS or any other type of protocol translation mechanism to be provided between the loadable device driver and the operating system or the mass memory storage peripheral computer device in order for the loadable device driver to communicate with the operating system and the mass memory storage peripheral computer device.
Also published as:
EP0806005WO/1997/018505