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1. AU1991069102 - Synchronous-asynchronous converter

Office Australia
Application Number 69102/91
Application Date 10.12.1990
Publication Number 1991069102
Publication Date 18.02.1993
Publication Kind A
IPC
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
J
MULTIPLEX COMMUNICATION
3
Time-division multiplex systems
16
in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
J
MULTIPLEX COMMUNICATION
3
Time-division multiplex systems
02
Details
06
Synchronising arrangements
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12
Data switching networks
64
Hybrid switching systems
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12
Data switching networks
70
Packet switching systems
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
Q
SELECTING
11
Selecting arrangements for multiplex systems
04
for time-division multiplexing
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
L
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
7
Arrangements for synchronising receiver with transmitter
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
Q
SELECTING
3
Selecting arrangements
42
Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
52
using static devices in switching stages, e.g. electronic switching arrangements
H04J 3/16
H04J 3/06
H04L 12/64
H04L 12/70
H04Q 11/04
H04L 7/00
CPC
H04L 12/64
H04J 3/0632
H04J 2203/0089
H04L 2012/5672
H04Q 11/0478
Applicants Alcatel N.V.
Inventors Balzano, Jean-Michel
Le Bouffant, Alain
Agents PHILLIPS ORMONDE FITZPATRICK
Priority Data 89 16497 13.12.1989 FR
Title
(EN) Synchronous-asynchronous converter
Abstract
(EN)
The converter is comprised of a memory (SRAM) having a first port and a second port, a managing circuit for the first port (SPM) connected to the first port, to an incoming synchronous multiplex line (ME) and to an outgoing synchronous multiplex line (MS), and a circuit for managing the second port (APM) connected to the second port, to an incoming asynchronous link (LE) through a FIFO type cell memory (M), and to an outgoing asynchronous link (LS). A control unit (MF) external to the converter, and applied to the port managing circuits, allows to choose the mode of operation of the converter; in a first mode (M32), each time interval of a raster of a synchronous multiplex is affected to communication channel, and in a second mode (M1) all time intervals of a synchronous raster are affected to a channel.

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