1. WO2026174460 - PHASE DETECTION PIXEL WITH DUAL CONVERSION GAIN AND PIXEL ARRAY

Publication Number WO/2026/174460

Publication Date 27.08.2026

International Application No. PCT/CN2025/078075

International Filing Date 19.02.2025

IPC

H04N 25/51 2023.1

H	ELECTRICITY
04	ELECTRIC COMMUNICATION TECHNIQUE
N	PICTORIAL COMMUNICATION, e.g. TELEVISION
25	Circuitry of solid-state image sensors ; Control thereof
50	Control of the SSIS exposure
51	Control of the gain

H04N 25/51 2023.1

H	ELECTRICITY
04	ELECTRIC COMMUNICATION TECHNIQUE
N	PICTORIAL COMMUNICATION, e.g. TELEVISION
25	Circuitry of solid-state image sensors ; Control thereof
50	Control of the SSIS exposure
51	Control of the gain

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Applicants

• HUAWEI TECHNOLOGIES CO., LTD. [CN]/[CN]

Inventors

• MONOI, Makoto

Agents

• BEIJING ZBSD PATENT & TRADEMARK AGENT LTD.

Priority Data

Publication Language English (en)

Filing Language English (en)

Designated States

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AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CV, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IQ, IR, IS, IT, JM, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, MG, MK, MN, MU, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UY, UZ, VC, VN, WS, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, CV, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SC, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)

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Title

(EN) PHASE DETECTION PIXEL WITH DUAL CONVERSION GAIN AND PIXEL ARRAY

(FR) PIXEL À DÉTECTION DE PHASE À DOUBLE GAIN DE CONVERSION ET MATRICE DE PIXELS

Abstract

(EN) According to the present disclosure, a phase detection autofocus (PDAF) pixel circuit having left and right pixel circuits is provided. Each of the left and right pixel circuits has a photodiode PD, a transfer gate Tx, a floating diffusion layer FD, a reset gate RS, and a dual conversion gain DCG circuit, and the DCG circuit being configured to switch a connection between the FD and a capacitor Ca.

(FR) La présente divulgation concerne un circuit de pixel d'autofocus à détection de phase (PDAF) comprenant des circuits de pixel gauche et droit. Chacun des circuits de pixels gauche et droit comprend une photodiode PD, une grille de transfert Tx, une couche de diffusion flottante FD, une grille de réinitialisation RS, et un circuit à double gain de conversion DCG, ledit circuit DCG étant configuré pour commuter une connexion entre la couche FD et un condensateur Ca.

Latest bibliographic data on file with the International Bureau

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