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1. WO1997023906 - SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME

Publication Number WO/1997/023906
Publication Date 03.07.1997
International Application No. PCT/JP1996/003803
International Filing Date 26.12.1996
IPC
H01L 21/8244 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
8244Static random access memory structures (SRAM)
H01L 27/11 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
11Static random access memory structures
CPC
H01L 27/11
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
11Static random access memory structures
Applicants
  • NKK CORPORATION [JP]/[JP] (AllExceptUS)
  • UMEKI, Mitoshi [JP]/[JP] (UsOnly)
  • INADA, Nobufumi [JP]/[JP] (UsOnly)
  • DAIMATSU, Masahiko [JP]/[JP] (UsOnly)
Inventors
  • UMEKI, Mitoshi
  • INADA, Nobufumi
  • DAIMATSU, Masahiko
Agents
  • SUZUYE, Takehiko
Priority Data
7/33874826.12.1995JP
8/2005806.02.1996JP
8/2005906.02.1996JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME
(FR) DISPOSITIF DE STOCKAGE A SEMI-CONDUCTEURS ET SON PROCEDE DE FABRICATION
Abstract
(EN)
A semiconductor storage device comprising a memory cell having a pair of transfer gate transistors, a pair of drive transistors, and a pair of resistive elements or thin film transistors and having a flip-flop structure by cross-coupling using a load of the pair of transfer gate transistors and the pair of resistive elements or thin film transistors. A diffusion layer (61) is provided in a contact region in the surface of a semiconductor substrate (51) and the first-layer polysilicon wiring (65) of the driver transistor facing the diffusion layer (61) in the flip-flop is directly connected to the diffusion layer (61).
(FR)
L'invention porte sur un dispositif de stockage à semi-conducteurs fait d'une cellule mémoire comportant des transistors à porte de transfert, une paire de transistors de commande, une paire d'éléments résistants ou de transistors à couche mince, et une structure bistable interconnectée utilisant une charge de la paire de transistors à porte de transfert et la paire d'éléments résistants ou les transistors à couche mince. Une couche de diffusion (61) est prévue dans une zone de contact de la surface du substrat de semi-conducteur (51), tandis que le câblage (65) de polysilicium de la première couche du transistor de commande faisant face à la couche de diffusion (61) dans la structure bistable est directement relié à la couche de diffusion (61).
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