1. WO2026085731 - DISPLAY PANEL AND DISPLAY APPARATUS

Publication Number WO/2026/085731

Publication Date 30.04.2026

International Application No. PCT/CN2024/126555

International Filing Date 22.10.2024

IPC

H10K 59/131 2023.1

H	ELECTRICITY
10	SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
K	ORGANIC ELECTRIC SOLID-STATE DEVICES
59	Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/155
10	OLED displays
12	Active-matrix OLED displays
131	Interconnections, e.g. wiring lines or terminals

H10K 59/121 2023.1

H	ELECTRICITY
10	SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
K	ORGANIC ELECTRIC SOLID-STATE DEVICES
59	Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/155
10	OLED displays
12	Active-matrix OLED displays
121	characterised by the geometry or disposition of pixel elements

H10K 59/131 2023.1

H	ELECTRICITY
10	SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
K	ORGANIC ELECTRIC SOLID-STATE DEVICES
59	Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/155
10	OLED displays
12	Active-matrix OLED displays
131	Interconnections, e.g. wiring lines or terminals

H10K 59/121 2023.1

H	ELECTRICITY
10	SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
K	ORGANIC ELECTRIC SOLID-STATE DEVICES
59	Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/155
10	OLED displays
12	Active-matrix OLED displays
121	characterised by the geometry or disposition of pixel elements

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Applicants

• 京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN]/[CN]
• 成都京东方光电科技有限公司 CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN]/[CN]
• 北京京东方技术开发有限公司 BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD. [CN]/[CN]

Inventors

• 崔宏达 CUI, Hongda
• 董向丹 DONG, Xiangdan
• 都蒙蒙 DU, Mengmeng
• 高文辉 GAO, Wenhui
• 李鑫海 LI, Xinhai
• 官慧 GUAN, Hui
• 胡明 HU, Ming
• 邱海军 QIU, Haijun

Agents

• 北京中博世达专利商标代理有限公司 BEIJING ZBSD PATENT & TRADEMARK AGENT LTD.

Priority Data

Publication Language Chinese (zh)

Filing Language Chinese (zh)

Designated States

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AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CV, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IQ, IR, IS, IT, JM, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, MG, MK, MN, MU, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, WS, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, CV, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SC, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, ME, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)

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Title

(EN) DISPLAY PANEL AND DISPLAY APPARATUS

(FR) ÉCRAN D'AFFICHAGE ET APPAREIL D'AFFICHAGE

(ZH) 显示面板及显示装置

Abstract

(EN) A display panel and a display apparatus. The display panel comprises a substrate, a plurality of pixel circuits, a plurality of data lines, and a shielded line. The plurality of pixel circuits are located on the substrate, and are arranged in a plurality of rows and a plurality of columns. Each row of pixel circuits comprises at least two pixel circuits arranged in a first direction, and each column of pixel circuits comprises at least two pixel circuits arranged in a second direction, wherein the first direction intersects the second direction, and each pixel circuit comprises a storage capacitor, which is configured to store a data signal. The plurality of data lines are located on the sides of the pixel circuits that are away from the substrate; and in an orthographic projection toward the substrate, one data line is located between two adjacent columns of storage capacitors. The shielded line is located between the plurality of pixel circuits and the plurality of data lines; and in an orthographic projection toward the substrate, the shielded line is at least partially located between the data lines and the storage capacitors.

(FR) L'invention concerne un écran d'affichage et un appareil d'affichage. L'écran d'affichage comprend un substrat, une pluralité de circuits de pixels, une pluralité de lignes de données et une ligne blindée. La pluralité de circuits de pixels sont situés sur le substrat, et sont agencés en une pluralité de rangées et une pluralité de colonnes. Chaque rangée de circuits de pixels comprend au moins deux circuits de pixels agencés dans une première direction, et chaque colonne de circuits de pixels comprend au moins deux circuits de pixels agencés dans une seconde direction, la première direction croisant la seconde direction, et chaque circuit de pixel comprenant un condensateur de stockage, qui est configuré pour stocker un signal de données. La pluralité de lignes de données sont situées sur les côtés des circuits de pixels qui sont éloignés du substrat ; et dans une projection orthographique vers le substrat, une ligne de données est située entre deux colonnes adjacentes de condensateurs de stockage. La ligne blindée est située entre la pluralité de circuits de pixels et la pluralité de lignes de données ; et, dans une projection orthographique vers le substrat, la ligne blindée est située au moins en partie entre les lignes de données et les condensateurs de stockage.

(ZH) 一种显示面板及显示装置，该显示面板包括衬底、多个像素电路、多条数据线和屏蔽线。多个像素电路位于衬底上，且排列成多行多列，每行像素电路包括沿第一方向排列的至少两个像素电路，每列像素电路包括沿第二方向排列的至少两个像素电路；其中，第一方向和第二方向交叉；像素电路包括存储电容器，存储电容器被配置为存储数据信号；多条数据线位于像素电路远离衬底的一侧；在向衬底的正投影中，一条数据线位于相邻两列存储电容器之间；屏蔽线位于多个像素电路和多条数据线之间；在向衬底的正投影中，屏蔽线至少部分位于数据线和存储电容器之间。

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