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1. CN111383705 - Test circuit and test method of a memory

Office
China
Application Number 201811648942.5
Application Date 30.12.2018
Publication Number 111383705
Publication Date 07.07.2020
Publication Kind A
IPC
G11C 29/50
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation; Testing stores during standby or offline operation
04Detection or location of defective memory elements
50Marginal testing, e.g. race, voltage or current testing
CPC
G11C 29/50008
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
50008of impedance
G11C 2029/5004
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
5004Voltage
G11C 2029/5006
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
5006Current
G11C 29/50
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation ; ; Subsequent repair; Testing stores during standby or offline operation
04Detection or location of defective memory elements ; , e.g. cell constructio details, timing of test signals
50Marginal testing, e.g. race, voltage or current testing
Applicants CETHIK GROUP CO., LTD.
中电海康集团有限公司
ZHEJIANG HIKSTOR TECHNOLOGY CO., LTD.
浙江驰拓科技有限公司
Inventors LIU SHAOPENG
刘少鹏
XIONG BAOYU
熊宝玉
Agents 北京康信知识产权代理有限责任公司 11240
北京康信知识产权代理有限责任公司 11240
Title
(EN) Test circuit and test method of a memory
(ZH) 存储器的测试电路和测试方法
Abstract
(EN) The invention provides a test circuit and a test method of a memory. The memory comprises at least one memory unit, wherein the memory unit comprises a first end and a second end. The test circuit comprises a current applying unit and a voltage reading unit, wherein two ends of the current applying unit are electrically connected with a first end and a second end respectively, and the current applying unit is used for providing a constant current for the memory unit; and two ends of the voltage reading unit are electrically connected with the first end and the second end respectively, and thevoltage reading unit is used for reading a voltage of the memory unit at the constant current. The current applying unit of the test circuit provides the constant current for the memory unit, thus thememory unit works under the constant current, and the voltage reading unit reads the voltage of the memory unit under the constant current, so that the resistance of the memory unit can be calculatedby utilizing the constant current and the read voltage, and the resistance is only the resistance of the memory unit and does not include other parasitic resistances connected in series.
(ZH) 本申请提供了一种存储器的测试电路和测试方法。存储器包括至少一个存储单元,存储单元包括第一端和第二端,该测试电路包括:电流施加单元,电流施加单元的两端分别与第一端和第二端电连接,电流施加单元用于向存储单元提供恒定电流;电压读取单元,电压读取单元的两端分别与第一端和第二端电连接,电压读取单元用于读取存储单元在恒定电流时的电压。该测试电路的电流施加单元向存储单元提供恒定的电流,使得存储单元在恒定的电流下工作,电压读取单元读取存储单元在恒定电流时的电压,这样利用恒定电流和读取得到的电压就可以计算得到存储单元的电阻,该电阻仅为存储单元的电阻,不包括串联的其他寄生电阻。
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