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1. WO2020141123 - HISTORY-BASED INTRA MOST PROBABLE MODE DERIVATION

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

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HISTORY-BASED I NTRA MOST PROBABLE MODE DERIVATION

TECH NICAL FI ELD

[0001 ] The present disclosure relates generally to video processing, and more particularly, video encoding and/or decoding and related methods and devices.

BACKGROUND

[0002] A video sequence can include a series of pictures where each picture includes one or more components. Each component can be described as a two-dimensional rectangular array of sample values. A picture in a video sequence can include three components; one luma component Y where the sample values are luma values, and two chroma components Cb and Cr, where the sample values are chroma values. The dimensions of the chroma components can be smaller than the luma components by a factor of two in each dimension. For example, the size of the luma component of an HD picture would be 1920x1080 and the chroma components would each have the dimension of 960x540. Components are sometimes referred to as color components. Process are described herein that are useful for the encoding and decoding of video sequences, however, it should be understood that the techniques described can also be used for encoding and decoding of still images.

[0003] A block is a two-dimensional array of samples. In video coding, each component is split into blocks and the coded video bitstream is a series of blocks.

[0004] In video coding, the picture can be split into units that cover a specific area.

Each unit can include all blocks that make up that specific area and each block belongs fully to only one unit. The coding unit ("CU") in HEVC is an example of such a unit. A coding tree unit ("CTU") is a logical unit that can be split into several CUs.

[0005] I n HEVC, CUs are squares, i.e., they have a size of NxN luma samples, where N can have a value of 64, 32, 16 or 8. In the current H .266 test model Versatile Video Coding ("VVC"), CUs can also be rectangular, i.e. have a size of NxM luma samples where N is different to M.

[0006] There are two types of sample predictions: intra prediction and inter prediction.

Intra prediction predicts blocks based on spatial extrapolation of samples from previously decoded blocks of the same (current) picture. It can also be used in image compression, i.e., compression of still images where there is only one picture to compress/decompress. Inter prediction predicts blocks by using samples for previously decoded pictures.

[0007] Intra directional prediction is utilized in HEVC and VVC. In HEVC, there are 33 directional modes and 35 modes in total. In VVC, there are 65 directional modes and 67 modes in total. The remaining two modes, "planar" and "DC" are non-directional. Mode index 0 is used for the planar mode, and mode index 1 is used for the DC mode. The angular prediction mode indices range from 2 to 34 for HEVC and from 2 to 66 for VVC.

[0008] In Versatile Video Coding ("VVC"), a multiple reference line-based intra prediction was adopted and subsequently included into the VTM3.0 software version. The multiple reference line-based intra prediction extends the reference line from only the line nearest to the current block to four lines to the left of and above the current block. The line nearest to the current block is indexed by 0 and the extended reference lines are indexed by 1,

2 and 3. The reference line index is signaled in the bitstream. When the multiple reference line index is larger than 0, only angular intra prediction modes can be used for intra prediction. FIG. 1 shows an example of multiple reference line samples for an 8x8 CU 150 with reference line 110 with an index 0, reference line 120 with an index of 1, reference line 130 with an index of 2, and reference line 140 with an index of 3.

SUMMARY

[0009] According to some embodiments, a method in a decoder is provided for history-based intra most probable mode derivation. The method includes receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The method further includes generating a most probable mode, MPM, set that can include intra prediction modes that correspond to a history-based analysis. The method further includes performing an intra prediction for samples to decode the pictures by selecting an intra prediction mode from the MPM set that includes directional modes and non-

directional modes. Generating the MPM set can include generating an intra mode buffer table that is configured to include intra prediction modes corresponding to a previously decoded video block. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to each of the MPM's in the MPM set.

[0010] According to other embodiments, a method in an encoder is provided for history-based intra most probable mode derivation. The method include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The method further includes generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The method further includes performing an intra prediction for samples to encode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[001 1 ] According other embodiments, a decoder for a communication network is provided. The decoder can include a processor and a memory coupled with the processor. The memory can include instructions that when executed by the processor cause the processor to perform operations. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to decode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0012] According to other embodiments, an encoder for a communication network is provided. The encoder can include a processor and memory coupled with the processor. The memory can include instructions that when executed by the processor cause the processor to perform operations. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to encode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0013] According to other embodiments, a computer program is provided. The computer program can include computer-executable instructions configured to cause a decoder to perform operations when the computer-executable instructions are executed on a processor comprised in the decoder. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to decode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0014] According to other embodiments, a computer program is provided. The computer program can include computer-executable instructions configured to cause an

encoder to perform operations when the computer-executable instructions are executed on a processor comprised in the encoder. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to encode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0015] According to other embodiments, a computer program product is provided. The computer program product can include a computer-readable storage medium, the computer-readable storage medium having computer-executable instructions configured to cause a decoder to perform operations when the computer-executable instructions are executed on a processor comprised in the decoder. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to decode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0016] According to other embodiments, a computer program product is provided. The computer program product can include a computer-readable storage medium, the computer-readable storage medium having computer-executable instructions configured to cause an encoder to perform operations when the computer-executable instructions are executed on a

processor comprised in the encoder. The operations can include receiving an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value. The operations can further include generating a most probable mode, MPM, set that includes a plurality of intra prediction modes that correspond to a history-based analysis. The operations can further include performing an intra prediction for samples to encode the pictures by selecting an intra prediction mode that includes a plurality of directional modes and a plurality of non-directional modes. Generating the MPM set can include generating at least one mode in the MPM set from an intra mode buffer table that is configured to include intra prediction modes. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to a previously decoded video block.

[0017] Various embodiments described herein can improve the coding efficiency of coding the intra prediction modes by improving the generation of the MPM set, and the non-MPM set.

BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings, which are included to provide a further

understanding of the disclosure and are incorporated in and constitute a part of this

application, illustrate certain non-limiting embodiments of inventive concepts. In the drawings:

[0019] FIG. 1 is a schematic diagram illustrating an example of multiple reference line samples for an 8x8 coding unit ("CU");

[0020] FIG. 2 is a schematic diagram illustrating an example of intra modes of two neighboring blocks, A and L;

[0021 ] FIG. 3 is a table illustrating an example of modes in an MPM list when no intra mode can be obtained from A and L;

[0022] FIG. 4 is a table illustrating an example of modes in an MPM list when modeA and modeB are equal and angular modes;

[0023] FIG. 5 is a table illustrating an example of modes in an MPM list when mode A and modeB are different angular modes;

[0024] FIG. 6 is a table illustrating an example of modes in an MPM list when modeA is different than modeB and only one of them is an angular mode;

[0025] FIG. 7 is a table illustrating an example of intra mode code binarization;

[0026] FIGS. 8-11 are table illustrating examples of BD rate performance compared to

VTM3.0 according to some embodiments of the present disclosure;

[0027] FIG. 12 is a schematic diagram illustrating an example of intra mode buffer table updates according to some embodiments of the present disclosure;

[0028] FIG. 13 is a schematic diagram illustrating an example of intra mode buffer table update in CTUs in one slice according to some embodiments of the present disclosure;

[0029] FIG. 14 is a schematic diagram illustrating another example of intra mode buffer table updates according to some embodiments of the present disclosure;

[0030] FIG. 15 is a block diagram illustrating an example of an electronic device (UE) according to some embodiments of the present disclosure;

[0031 ] FIG. 16 is a block diagram illustrating an example of encoder operations according to some embodiments of the present disclosure;

[0032] FIG. 17 is a block diagram illustrating an example of decoder operations according to some embodiments of the present disclosure;

[0033] FIG. 18 is a flow chart illustrating an example of a process for decoding a picture by generating a motion vector predictor list according to some embodiments of the present disclosure;

[0034] FIGS. 19-21 are flow charts illustrating examples of processes for resetting an intra mode buffer table according to some embodiments of the present disclosure;

[0035] FIG. 22 is a flow chart illustrating and example of a process for encoding a picture by generating a motion vector predictor list according to some embodiments of the present disclosure;

[0036] FIG. 23 is a block diagram of a wireless network in accordance with some embodiments;

[0037] FIG. 24 is a block diagram of a user equipment in accordance with some embodiments

[0038] FIG. 25 is a block diagram of a virtualization environment in accordance with some embodiments;

[0039] FIG. 26 is a block diagram of a telecommunication network connected via an intermediate network to a host computer in accordance with some embodiments;

[0040] FIG. 27 is a block diagram of a host computer communicating via a base station with a user equipment over a partially wireless connection in accordance with some embodiments;

[0041 ] FIG. 28 is a block diagram of methods implemented in a communication system including a host computer, a base station, and a user equipment in accordance with some embodiments;

[0042] FIG. 29 is a block diagram of methods implemented in a communication system including a host computer, a base station, and a user equipment in accordance with some embodiments;

[0043] FIG. 30 is a block diagram of methods implemented in a communication system including a host computer, a base station, and a user equipment in accordance with some embodiments; and

[0044] FIG. 31 is a block diagram of methods implemented in a communication system including a host computer, a base station, and a user equipment in accordance with some embodiments.

DETAILED DESCRIPTION

[0045] This application claims the benefit of U.S. Provisional Application No. 62/787,341 titled "History-Based Intra Most Probable Mode Derivation," filed on January 1, 2019, the disclosure of which is hereby incorporated in its entirety by reference.

[0046] Inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which examples of embodiments of inventive concepts are shown. Inventive concepts may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of present inventive concepts to those skilled in the art. It should also be noted that these embodiments are not mutually exclusive. Components from one embodiment may be tacitly assumed to be present/used in another embodiment.

[0047] In a current version of VVC, the 67 intra prediction modes are subdivided into the most probable modes ("MPM") set and the non-MPM set. The MPM set contains six modes, and the non-MPM set contains 61 modes.

[0048] The six modes in the MPM set are derived from the intra modes of the two neighboring blocks (block L 210 and block A 220) that are shown in FIG. 2 along with Current CU 250.

[0049] The derived MPM list will look differently depending upon a type of each of blocks A and L. In some cases, neither A nor L will have an intra mode, for instance if both blocks are coded using pure inter coding (not combined coding, which has an intra mode) or we are dealing with the top left CU in the picture which does not have any neighbors.

[0050] FIG. 3 depicts a table of modes in the MPM list if no intra mode can be obtained from A and L. As can be seen in the table, this MPM includes frequently used modes such as planar, dc and diagonal directions, but does not use any modes from surrounding blocks.

[0051 ] FIG. 4 depicts a table of modes in the MPM list if A and B are available, but their intra modes (called modeA and modeB respectively) are the same (modeA=modeB) and angular (for instance, if both of them are equal to INTRA_ANGULAR43). The three last modes are based on modeA. For instance, index 4 represents an angle that is one step away from modeA and hence has a very similar angle. Adding 61 changes the angle about 180 degrees, which is sometimes useful, and adding 60 gives a similar angle. The % operator denotes modulus calculation and is used to make sure to get back into a valid angular mode after addition.

[0052] FIG. 5 depicts a table of modes in the MPM list if A and B are available and different (modeA¹ modeB), and both modes are angular (modeA>l, modeB > 1). Here modeMax = max(modeA, modeB). The last two modes (index 4 and 5) use the regular column (middle column) if modeMax-modeMin is in the range [2, 62], where modeMin = min(modeA,

modeB). If modeMax-modeMin is outside of that range, the alternative mode is selected (last column).

[0053] Fig. 6 depicts a table of modes in the MPM list if A and B are available and different and one is angular and one is not (modeA+modeB>2 and (modeA<2 or modeB<2)). Here the regular column (middle column) is used if modeMin = INTRA_PLANAR, and otherwise the alternate column (right most column) is used.

[0054] If none of the if-statements described above are satisfied, the table in FIG. B can be used as fallback.

[0055] The processes described above for generating the MPM are for when the reference line equals 0. If the reference line is 1, 2 or 3, the MPM can be created in a similar but different way that excludes the planar and dc modes.

[0056] The non-MPM set includes the 61 modes which are not included in MPM set.

The modes in the non-MPM set are ordered from the smallest to the largest.

[0057] When multiple reference line operation are enabled and the multiple reference line index is not 0, only the mode from MPM can be used for encoding / decoding intra prediction.

[0058] There is a flag to signal if the mode used is in the MPM set (flag=l) or not

(flag=0). The specific mode in the MPM set to use is coded with a unary code word. The modes in the non-MPM set is coded with a truncated binary code word. The intra mode code words used for signaling are shown in the table depicted in FIG. 7

[0059] Of the 67 intra prediction modes in VVC, 6 modes are in the MPM set and 61 modes are in the non-MPM set. The modes in the non-MPM set require more bits when coded than the modes in the MPM set. The current processes that uses two neighboring intra prediction modes to generate the MPM set could cause inefficient coding of intra prediction modes for the following two reasons.

[0060] First, it is noticed that the intra prediction modes are spatially correlated, which means that some intra prediction modes are selected more frequently than others in a spatial neighborhood. Some current processes use two neighboring intra prediction modes to generate MPM set. The rest of modes (up to 6 modes) in the MPM set are populated by

derived modes and default modes. But, neither the derived modes nor the default modes can capture the spatial correlation.

[0061 ] Second, the non-MPM set includes 61 modes. The three smallest indexes in non- MPM set is coded with 5 bits. The remaining 58 modes indexes are coded with 6 bits. These 61 modes are arranged in order from small to large mode index. This means that modes with a small mode index can get a smaller code (5 bits), whereas modes with a large mode index always gets a larger code (6 bits). This is in spite of the fact that modes with small mode indices may not be more likely than modes with large mode indices. Hence this way of coding can be inefficient.

[0062] Various embodiments described herein use a history-based intra MPM

derivation method to code the intra prediction mode. An intra mode buffer table can be defined as the intra prediction information of a previously coded block. The table can include angular intra prediction modes. The table can be maintained during the encoding and/or decoding process. The table can be reset to a pre-defined intra angular mode ordering when a new slice is encountered.

[0063] Some embodiments can improve the coding efficiency of coding the intra prediction modes. This can be done by improving the generation of the MPM set, and the non-MPM set.

[0064] FIGS. 8-9 depict tables of BD rate performance compared to VTM3.0 when some embodiments of intra mode coding improvements in VVC was implemented.

[0065] FIGS. 10-11 depict tables of BD rate performance compared to VTM3.0 when another embodiment of intra mode coding improvement in VVC was implemented. In this embodiment, the MPM set was extended from 6 to 9 and the last three modes in MPM set were used as the first 3 modes in non-MPM set.

[0066] In some embodiments, video encoding or decoding can include an intra mode buffer table being applied to capture the intra prediction modes of previous decoded blocks and generate the MPM set. The buffer table may be realized as a FIFO queue or FIFO list where the elements in the queue consists of Intra modes stored as integer values. Once the FIFO queue is fully populated, adding a new element to the FIFO queue always removes an element

from the queue. The queue may include a fixed number of entries and start with pre-defined elements. When a new element is added it can be added last in the queue. If there is an existing element in the queue before the new element is added having the same value as the added element, that existing element can be removed from the queue. If there is no existing element in the queue before the new element is added having the same value as the added element, the first element in the queue can be removed. The last element in the queue can correspond to the last entry in the table.

[0067] The buffer table can be reset when a new slice is encountered. In some embodiments, the buffer table can be reset when a new tile group is encountered. In additional or alternative embodiments, the buffer table can be reset when a new tile is encountered. In additional or alternative embodiments, the buffer table can be reset whenever the entropy codec is reset, for example whenever an arithmetic codec resets its internal state or states.

[0068] In some embodiments, an intra mode buffer table can be defined to capture the intra prediction information from a previously coded block. The intra mode buffer table can maintained during the encoding and/or decoding process. The table can include six unique angular intra prediction modes. Whenever there is a block that is coded with an angular intra prediction mode, the mode can be added to the last entry of the table and the first entry of table can be removed from the table if no duplicated mode is found in the table, otherwise the duplicated mode is removed from the table. FIG. 12 shows an example of the update process of intra mode buffer table.

[0069] The intra mode buffer table can be maintained during the encoding and/or decoding process. The table can be reset to a pre-defined intra angular mode ordering

[VERJDX, HORJDX, VERJDX - 4, VERJDX + 4, 2, DIAJDX] when a new slice is encountered. VERJDX is the last entry in the table, or equivalently the last element in the queue. When starting to encode and/or decode a CTU, the intra mode buffer table can inherit from the last block in the CTU to the left of the current CTU. If the current CTU is at the left picture boundary, the intra mode buffer table can inherit from the last block in the CTU above the current CTU. FIG. 5 shows an example of intra mode buffer table update in CTUs in one slice. [0070] When a luma block is encoded / decoded by intra prediction mode X, the MPM set is derived by using all or a subset of the following operations.

1. If the left neighboring block is encoded / decoded by intra prediction mode L,

a. If multi reference line index is 0, insert L into the MPM set

b. If multi reference line index > 0,

i. If L > DCJDX, insert L into the MPM set

2. If the above neighboring block is encoded / decoded by intra prediction mode A,

a. If multi reference line index is 0,

i. If A is not yet in the MPM set, insert A into the MPM set b. If multi reference line index > 0,

i. If A > DCJDX

1. If A has not yet in the MPM set, insert A into the MPM set

3. If multi reference line index is 0,

a. If PLANARJDX is not yet in the MPM set, insert PLANARJDX into the MPM set b. If DCJDX is not yet in the MPM set, insert DCJDX into the MPM set

4. Inserting mode X in intra mode buffer table into the MPM set, start from the last entry in table,

a. If mode X is not yet in the MPM set, insert mode X into the MPM set b. If mode X is already in the MPM set,

i. If adjacent mode X-l is not yet in the MPM set, insert mode X-l into the MPM set

ii. If MPM set is not complete,

1. If adjacent mode X+l is not yet in the MPM set, insert X+l into the MPM set

5. If MPM set is not complete, repeat step 4

[0071 ] The idx for the elements in the MPM set can correspond to the order in which the modes are inserted into the MPM set. The first inserted element has idx equal to 0, the second inserted element has idx equal to 1, etc. The Intra mode for a block may be decoded using the binarization shown in FIG. 3, but other decoding of intra modes is possible.

[0072] In additional or alternative embodiments, the intra mode buffer table can be used to generate the MPM set. The first 3 modes in non-MPM set can be generated. The intra mode buffer table can include 9 unique intra prediction modes. FIG. 14 shows an example of the update process of intra mode buffer table for this embodiment.

[0073] The intra mode buffer table can be maintained during the encoding and/or decoding process. The table can be reset to a pre-defined intra angular mode ordering

[VERJDX, HORJDX, VERJDX - 4, VERJDX + 4, 2, DIAJDX, VDIAJDX, DIAJDX - 8, DIAJDX + 8] when a new slice is encountered.

[0074] The MPM set can be extended from 6 intra prediction modes to 9 intra prediction modes, where the first 6 modes in MPM set are used as MPM modes and the last 3 modes in MPM set are used as the first three non-MPM modes.

[0075] When a luma block is encoded and/or decoded by intra prediction mode X, the

MPM set can be derived by using all or a subset of following steps:

1. If left neighboring block is encoded / decoded by intra prediction mode L,

a. If multi reference line index is 0, insert L into the MPM set

b. If multi reference line index > 0,

i. If L > DCJDX, insert L into the MPM set

2. If above neighboring block is encoded / decoded by intra prediction mode A,

a. If multi reference line index is 0,

i. If A has not yet in MPM set, insert A into the MPM set b. If multi reference line index > 0,

i. If A > DCJDX

1. If A has not yet in MPM set, insert A into the MPM set

3. If multi reference line index is 0,

a. If PLANARJDX has not yet in MPM set, insert PLANARJDX into the MPM set b. If DCJDX has not yet in MPM set, insert DCJDX into the MPM set

4. Inserting mode X in intra mode buffer table into the MPM set, start from the last entry in table,

a. If the mode X has not yet in MPM set, insert the mode X into the MPM set b. If the mode X in intra mode buffer table is already in MPM set,

i. If adjacent mode X-l has not yet in MPM set, insert X-l into the MPM set ii. If MPM set is not complete,

1. If adjacent mode X+l has not yet in MPM set, insert X+l into the MPM set

5. If MPM set is not complete, repeat step 4

[0076] The idx for the elements in the MPM set can correspond to the order in which the modes are inserted into the MPM set. The first inserted element has idx equal to 0, the second inserted element has idx equal to 1, etc. The Intra mode for a block may be decoded using the binarization shown in FIG. B, but other implementations are possible.

[0077] The non-MPM set can be derived by inserting the last 3 modes from MPM set.

The non-MPM set can be further derived by inserting the rest of the 58 modes which can be sorted from smallest to largest mode index.

[0078] In additional or alternative embodiments, the intra mode buffer table can be maintained during the encoding and/or decoding process. The table can be reset to the pre defined intra modes ordering when a new CTU is encountered.

[0079] In additional or alternative embodiments, there could be more than one history-based intra mode buffer table to represent the previously coded intra prediction modes. For example, there could be three history-base intra mode buffer tables to represent the previously coded intra prediction modes of NxN square CUs, NxM rectangular CUs and MxN rectangular CUs (where N>M) respectively.

[0080] In additional or alternative embodiments, there could be an additional condition check when updating the intra mode buffer table. When there is a block that is coded with an intra prediction mode, if the mode is angular intra prediction mode then the intra mode buffer table can be updated by adding the mode to the last entry of the table.

[0081 ] Compared to a big size block, the intra prediction of small size block can be unlikely to represent the spatial correlation. To avoid the intra mode buffer table be flushed by angular intra prediction mode from small size block, 4x4 block as an example, one additional condition check can be added to decide whether the coded angular intra prediction mode will be added to the intra mode buffer table. In some examples, a condition check can be added to determine whether the coded block (width * height) is larger than a threshold Sthr. One example value of Sthr is 16, which will exclude the 4x4 block. In additional or alternative examples, a condition check can be added to determine whether the coded block with both width and height is larger than a threshold Sthr. One example value of Sthr is 4, which will exclude the 4xN and Nx4 blocks, where N = 4,8,16, 32, 64, 128. In additional or alternative examples, a condition check can be added to determine whether the coded block with width or height is larger than a threshold Sthr. One example value of Sthr is 8, which will exclude the 4x4, 4x8, 8x4 and 8x8 blocks.

[0082] In some examples, when a block is coded with an intra prediction modes, determining whether the mode will be added to the intra mode buffer table can be based on 1) checking if the mode is angular mode; and 2) checking if the block size is larger than a threshold.

[0083] FIG. 15 is a block diagram illustrating an electronic device 1500 (which may be a wireless device, a 3GPP user equipment or UE device, etc.) according to some embodiments disclosed herein. As shown, electronic device 1500 may include processor 1503 coupled with communication interface 1501, memory 1505, camera 1507, and screen 1509. Communication interface 1501 may include one or more of a wired network interface (e.g., an Ethernet interface), a WiFi interface, a cellular radio access network (RAN) interface (also referred to as a RAN transceiver), and/or other wired/wireless network communication interfaces. Electronic device 1500 can thus provide wired/wireless communication over one or more wire/radio links with a remote storage system to transmit and/or receive an encoded video sequence.

Processor 1503 (also referred to as a processor circuit or processing circuitry) may include one or more data processing circuits, such as a general purpose and/or special purpose processor (e.g., microprocessor and/or digital signal processor). Processor 1503 may be configured to

execute computer program instructions from functional modules in memory 1505 (also referred to as a memory circuit or memory circuitry), described below as a computer readable medium, to perform some or all of the operations and methods that are described herein for one or more of the embodiments. Moreover, processor 1503 may be defined to include memory so that separate memory 1505 may not be required. Electronic device 1500 including, communication interface 1501, processor 1503, and/or camera 1507 may thus perform operations, for example, discussed below with respect to the figures and/or Example

Embodiments.

[0084] According to some embodiments, electronic device 1500 (e.g., a smartphone) may generate an encoded video sequence that is either stored in memory 1505 and/or transmitted through communication interface 1501 over a wired network and/or wireless network to a remoted device. In such embodiments, processor 1503 may receive a video sequence from camera 1509, and processor may encode the video sequence to provide the encoded video sequence that may be stored in memory 1505 and/or transmitted through communication interface 1501 to a remote device.

[0085] According to some other embodiments, electronic device 1500 may decode an encoded video sequence to provide a decoded video sequence that is rendered on display 1509 for a user to view. The encoded video sequence may be received from a remote

communication device through communication interface 1501 and stored in memory 1505 before decoding and rendering by processor 1503, or the encoded video sequence may be generated by processor 1503 responsive to a video sequence received from camera 1507 and stored in memory 1505 before decoding and rendering by processor 1503. Accordingly, the same device may thus encode a video sequence and then decode the video sequence.

Operations of encoding and decoding performed by processor 1503 will now be discussed with reference to FIGS. 16-17.

[0086] FIG. 16 is a schematic block diagram of an encoder 1640 which may be implemented by processor 1503 to encode a block of pixels in a video image (also referred to as a frame) of a video sequence according to some embodiments of inventive concepts.

[0087] A current block of pixels is predicted by performing a motion estimation using motion estimator 1650 from an already provided block of pixels in the same frame or in a previous frame. The result of the motion estimation is a motion or displacement vector associated with the reference block, in the case of inter prediction. The motion vector may be used by motion compensator 1650 to output an inter prediction of the block of pixels.

[0088] Intra predictor 1649 computes an intra prediction of the current block of pixels.

The outputs from the motion estimator/compensator 1650 and the intra predictor 1649 are input in selector 1651 that either selects intra prediction or inter prediction for the current block of pixels. The output from the selector 1651 is input to an error calculator in the form of adder 1641 that also receives the pixel values of the current block of pixels. Adder 1641 calculates and outputs a residual error as the difference in pixel values between the block of pixels and its prediction.

[0089] The error is transformed in transformer 1642, such as by a discrete cosine transform, and quantized by quantizer 1643 followed by coding in encoder 1644, such as by entropy encoder. In inter coding, also the estimated motion vector is brought to encoder 1644 to generate the coded representation of the current block of pixels.

[0090] The transformed and quantized residual error for the current block of pixels is also provided to an inverse quantizer 1645 and inverse transformer 1646 to retrieve the original residual error. This error is added by adder 1647 to the block prediction output from the motion compensator 1650 or intra predictor 1649 to create a reference block of pixels that can be used in the prediction and coding of a next block of pixels. This new reference block is first processed by a deblocking filter 1600 according to examples/embodiments discussed below to perform deblocking filtering to reduce/combat blocking artifacts. The processed new reference block is then temporarily stored in frame buffer 1648, where it is available to intra predictor 1649 and motion estimator/compensator 1650.

[0091 ] FIG. 17 is a corresponding schematic block diagram of decoder 1760 including deblocking filter 1600 which may be implemented by processor 503 according to some embodiments of inventive concepts. Decoder 1760 includes decoder 1761, such as entropy decoder, to decode an encoded representation of a block of pixels to get a set of quantized and transformed residual errors. These residual errors are dequantized by inverse quantizer 1762 and inverse transformed by inverse transformer 1763 to provide a set of residual errors.

[0092] These residual errors are added by adder 1764 to the pixel values of a reference block of pixels. The reference block is determined by a motion estimator/compensator 1767 or intra predictor 1766, depending on whether inter or intra prediction is performed. Selector 1768 is thereby interconnected to adder 1764 and motion estimator/compensator 1767 and intra predictor 1766. The resulting decoded block of pixels output form adder 1764 is input to deblocking filter 1600 according to some embodiments of inventive concepts to provide deblocking filtering of blocking artifacts. The filtered block of pixels is output from decoder 1760 and may be furthermore temporarily provided to frame buffer 1765 to be used as a reference block of pixels for a subsequent block of pixels to be decoded. Frame buffer 1765 is thereby connected to motion estimator/compensator 1767 to make the stored blocks of pixels available to motion estimator/compensator 1767.

[0093] The output from adder 1764 may also be input to intra predictor 1766 to be used as an unfiltered reference block of pixels.

[0094] In embodiments of FIGS. 16-17, deblocking filter 1600 may perform deblocking filtering as so called in-loop filtering. In alternative embodiments at decoder 1760, deblocking filter 1600 may be arranged to perform so called post-processing filtering. In such a case, deblocking filter 1600 operates on the output frames outside of the loop formed by adder 1764, frame buffer 1765, intra predictor 1766, motion estimator/compensator 1767, and selector 1768. In such embodiments, no deblocking filtering is typically done at the encoder. Operations of deblocking filter 1600 will be discussed in greater detail below.

[0095] According to some embodiments of inventive concepts, a deblocking filter may reduce blocking artifacts by interpolating boundary samples from a first side of the block boundary to a second side of the block boundary without significant modifications of the low frequency components in the signal (such as a ramp).

[0096] For both sides of the block boundary, the interpolation may be performed using a determined sample value at a position further away from the block boundary than the sample furthest away from the block boundary to be filtered to a determined sample value at a

position in the middle of all samples to be filtered or at a position in between the boundary samples.

[0097] For each side of the block boundary, the interpolation of samples may be performed by interpolation between a weighted average of a first set of sample values centered in the middle of the total samples to be filtered or centered at a position in between the boundary samples and a weighted average of a second set of sample values determined at a position further away than the sample that is furthest away among the samples to be filtered.

[0098] Operations of electronic device 1500 will now be discussed with reference to the flow charts of FIGS. 18-22 according to some embodiments of inventive concepts. For example, modules (also referred to as units) may be stored in memory 1505 of FIG. 15, and these modules may provide instructions so that when the instructions of a module are executed by processor 1503, processor 1503 performs respective operations of the flow charts of FIGS. 18-22.

[0099] FIG. 18 depicts a flow chart illustrating an example of a process for decoding a picture by generating a motion vector predictor list. At block 1810, processor 1503 receives an encoded video block that includes a sequence of pictures. Each of the pictures can include a luma value and a chroma value.

[00100] At block 1820, processor 1503 generates a most probable mode, MPM, set that includes intra prediction modes that correspond to a history-based analysis. In some embodiments, processor 1503 generates an intra mode buffer table that is configured to include intra prediction modes corresponding to a previously decoded video block. The intra mode buffer table can include a first-in-first-out, FIFO, buffer that includes elements that correspond to each of the MPM'S in the MPM set. The elements can be initially predefined elements and a new element can replace one of the initially predefined elements. The FIFO buffer can include a fixed number of elements.

[00101 ] In some embodiments, processor 1503 can compare a new element to existing elements in the FIFO buffer. Responsive to the new element being the same as one of the existing elements in the FIFO buffer, processor 1503 can remove the one of the existing elements in the FIFO buffer and add the new element to the last position of the FIFO buffer.

Responsive to the new element being different from the existing elements in the FIFO buffer, processor 1503 can remove the one of the existing elements that is in a first position of the FIFO buffer and add the new element to a last position of the FIFO buffer.

[00102] In additional or alternative embodiments, the intra mode buffer table can capture intra prediction from previously coded blocks.

[00103] In additional or alternative embodiments, the intra mode buffer table comprises elements corresponding to unique angular intra prediction modes. Responsive to receiving a new element including one of the angular intra prediction modes, processor 1503 can add the new element to a last entry of the intra mode buffer table and remove a matching one of the angular predictions modes from the intra mode buffer table. Responsive to receiving a new element including a different angular prediction mode than the angular intra prediction modes, processor 1503 can add the new element to a last entry of the intra mode buffer table and remove a first entry of the intra mode buffer.

[00104] FIGS. 19-21 depict flow charts illustrating examples of resetting the intra mode buffer. In FIG. 19, at block 1940, processor 1503 can receive a new encoded video block. At block 1950, responsive to receiving the new encoded video block, processor 1503 can reset the intra mode buffer table to the initially predefined elements. In FIG. 20, at block 2040, processor 1503 can receive a new tile of encoded video blocks. At block 2050, responsive to receiving the new tile of encoded video blocks, processor 1503 can reset the intra mode buffer table. In FIG. 21, at block 2140, processor 1503 can receive a new group of tiles of encoded video blocks. At block 2150, responsive to receiving the new group of tiles of encoded video blocks, processor 1503 can reset the intra mode buffer table.

[00105] In additional or alternative embodiments, the intra mode buffer table resets responsive to an arithmetic code resetting at least one internal state. In additional or alternative embodiments, the table is reset to a predefined intra angular mode. In additional or alternative embodiments, the intra mode buffer table is maintained during an encoding and/or a decoding operation. In additional or alternative embodiments, processor 1503 can reset the intra mode buffer table to a pre-defined intra modes ordering responsive to a using a new coding tree unit.

[00106] Returning to block 1820 of FIG. 18, in some embodiments, generating the MPM set can include, responsive to a left neighboring block being decoded by an intra prediction mode L and a multi-reference line index being zero, processor 1503 can add the intra prediction mode L to the MPM set. In additional or alternative embodiments, responsive to the left neighboring block being decoded by the intra prediction mode L, the multi-reference line index being greater than zero, and the intra prediction mode L being greater than a DC index, processor 1503 can add the intra prediction mode L to the MPM set.

[00107] In additional or alternative embodiments, responsive to an above neighboring block being decoded by an intra prediction mode A, a multi-reference line index being zero, and intra prediction mode A not being in the MPM set, processor 1503 can add the intra prediction mode A to the MPM set. In additional or alternative embodiments, responsive to the above neighboring block being decoded by the intra prediction mode A, the multi-reference line index being greater than zero, and the intra prediction mode A being greater than a DC index, and the intra prediction mode A not being in the MPM set, processor 1503 can add the intra prediction mode A to the MPM set.

[00108] In additional or alternative embodiments, responsive to a multi-reference line index being zero and a planar mode not being in the MPM set, processor 1503 can add the planar mode to the MPM set. In additional or alternative embodiments, responsive to the multi-reference line index being zero and a DC mode not being in the MPM set, processor 1503 can add the DC mode to the MPM set.

[00109] In additional or alternative embodiments, responsive to intra prediction mode X not being in the MPM set, processor 1503 can add the intra prediction mode X to the MPM set at a last position of the intra mode buffer table. In additional or alternative embodiments, responsive to the intra prediction mode X being in the MPM set and adjacent intra prediction mode X-l not being in the MPM set, processor 1503 can add the adjacent intra prediction mode X-l to the MPM set at a last position of the intra mode buffer table.

[001 10] In additional or alternative embodiments, responsive to the MPM set being incomplete and adjacent intra prediction mode X-l not being in the MPM set, processor 1503 can add the adjacent intra prediction mode X-l to the MPM set at a last position of the intra mode buffer table.

[001 1 1 ] In additional or alternative embodiments, the MPM set includes six modes. In additional or alternative embodiments, the MPM set includes MPM modes and the intra mode buffer table further generates a portion of the modes in a non-MPM set. In additional or alternative embodiments, the MPM set includes nine modes and the intra mode buffer table further generates 3 modes in a non-MPM set. The non-MPM set can be derived by sorting prediction modes from a smallest to a largest mode index. In additional or alternative embodiments, the intra mode buffer table can include intra mode buffer tables and each of the intra mode buffer tables can include a different dimensional characteristic (e.g., a block dimensional characteristic) from other ones of the intra mode buffer tables.

[001 12] In some embodiments, processor 1503 can determine a block size relative to a block size threshold. Responsive to the block size being less than the block size threshold, processor 1503 may not update the intra mode buffer table corresponding to the block. In additional or alternative embodiments, processor 1503 can determine a block dimension ratio of a first block dimension to a second block dimension. Processor 1503 can compare the block dimension ratio to a block dimension ratio threshold and responsive to the block dimension ratio being less than the block dimension ratio threshold, processor 1503 may not update the intra mode buffer table corresponding to the block. In additional or alternative embodiments, processor 1503 can determine a minimum block dimension relative to a block dimension threshold. Responsive to the minimum block dimension being less than the block dimension threshold, processor 1503 may not update the intra mode buffer table corresponding to the block.

[001 13] At block 1830, processor 1503 performs an intra prediction for samples to decode the pictures by selecting an intra prediction mode that includes directional modes and non-directional modes. In some embodiments, processor 1503 performs the intra prediction for samples to decode the pictures by selecting an intra prediction mode from the MPM set. In some embodiments, responsive to the block being decoded using an intra prediction mode that is an angular intra prediction mode, processor 1503 can add the angular intra prediction mode to a last entry of the intra mode buffer table.

[001 14] FIG. 22 depicts a flow chart illustrating an example of a process for encoding a picture by generating a motion vector predictor list. Blocks 2210 and 2220 are similar to blocks 1810 and 1820 of FIG. 18. At block 2230, processor 1503 can perform an intra prediction for samples to encode the pictures by selecting an intra prediction mode that includes directional modes and non-directional modes.

[001 15] Various operations of FIGS. 18-22 may be optional with respect to some embodiments.

[001 16] Explanations for abbreviations from the above disclosure are provided below.

Abbreviation Explanation

MV Motion Vector

3GPP 3rd Generation Partnership Project

5G 5th Generation Wireless Systems

NG Next Generation

loT Internet of Things

AKA Authentication and Key Agreement

UICC Universal Integrated Circuit Card

SA2 3GPP architecture working group

SA3 3GPP security group

UP User Plane

LTE Long Term Evolution (4th Generation Wireless System)

CP Control Plane

AS Access Stratum

eNB Evolved Node B

UE User Equipment or End User Device

SMC Security Mode Command

RRC Radio Resource Control

PDCP Packet Data Convergence Protocol

RAN Radio Access Network

CN Core Network

PDU Packet Data Unit

DRB Data Radio Bearer

AN Access Network

(R)AN Both 3GPP and non-3GPP Access Networks

NAS Network Access Stratum

AMF Access and Mobility Management Function

NF Network Function

UDM Unified Data Management

PCF Policy Control Function

DRB-IP Data Radio Bearer Integrity Protected

IE Information Element

QoS Quality of Service

gNB Base Station in 5G

NEF Network Exposure Function

NWDAF Network Data Analytics Function

PCF Policy Control Function

UDM Unified Data Management

UPF User Plane Function

DL Downlink

UL Uplink

LLS Lower Layer Split

LLS-U Lower Layer Split User Plane

LLS-C Lower Layer Split Control Plane

LLS-CU Lower Layer Split Central Unit

PHY Physical Layer

MP Management Plane

SSM Synchronization Status Message

TRX Transceiver

[001 17] Further definitions and embodiments are discussed below.

[001 18] In the above-description of various embodiments of present inventive concepts, it is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of present inventive concepts. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which present inventive concepts belong. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[001 19] When an element is referred to as being "connected", "coupled", "responsive", or variants thereof to another element, it can be directly connected, coupled, or responsive to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected", "directly coupled", "directly responsive", or variants thereof to another element, there are no intervening elements present. Like numbers refer to like elements throughout. Furthermore, "coupled", "connected", "responsive", or variants thereof as used herein may include wirelessly coupled, connected, or responsive. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Well-known functions or constructions may not be described in detail for brevity and/or clarity. The term "and/or" includes any and all combinations of one or more of the associated listed items.

[00120] It will be understood that although the terms first, second, third, etc. may be used herein to describe various elements/operations, these elements/operations should not be limited by these terms. These terms are only used to distinguish one element/operation from another element/operation. Thus, a first element/operation in some embodiments could be termed a second element/operation in other embodiments without departing from the teachings of present inventive concepts. The same reference numerals or the same reference designators denote the same or similar elements throughout the specification.

[00121 ] As used herein, the terms "comprise", "comprising", "comprises", "include", "including", "includes", "have", "has", "having", or variants thereof are open-ended, and include one or more stated features, integers, elements, steps, components, or functions but does not preclude the presence or addition of one or more other features, integers, elements, steps, components, functions, or groups thereof. Furthermore, as used herein, the common abbreviation "e.g.", which derives from the Latin phrase "exempli gratia," may be used to introduce or specify a general example or examples of a previously mentioned item and is not intended to be limiting of such item. The common abbreviation "i.e.", which derives from the Latin phrase "id est," may be used to specify a particular item from a more general recitation.

[00122] Example embodiments are described herein with reference to block diagrams and/or flowchart illustrations of computer-implemented methods, apparatus (systems and/or devices) and/or computer program products. It is understood that a block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions that are performed by one or more computer circuits. These computer program instructions may be provided to a processor circuit of a general purpose computer circuit, special purpose computer circuit, and/or other programmable data processing circuit to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, transform and control transistors, values stored in memory locations, and other hardware components within such circuitry to implement the functions/acts specified in the block diagrams and/or flowchart block or blocks, and thereby create means (functionality) and/or structure for implementing the functions/acts specified in the block diagrams and/or flowchart block(s).

[00123] These computer program instructions may also be stored in a tangible computer-readable medium that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable medium produce an article of manufacture including instructions which implement the functions/acts specified in the block diagrams and/or flowchart block or blocks. Accordingly, embodiments of present inventive concepts may be embodied in hardware and/or in software

(including firmware, resident software, micro-code, etc.) that runs on a processor such as a digital signal processor, which may collectively be referred to as "circuitry," "a module" or variants thereof.

[00124] It should also be noted that in some alternate implementations, the

functions/acts noted in the blocks may occur out of the order noted in the flowcharts. For example, two blocks shown in succession may in fact be executed substantially concurrently or the blocks may sometimes be executed in the reverse order, depending upon the

functionality/acts involved. Moreover, the functionality of a given block of the flowcharts and/or block diagrams may be separated into multiple blocks and/or the functionality of two or more blocks of the flowcharts and/or block diagrams may be at least partially integrated.

Finally, other blocks may be added/inserted between the blocks that are illustrated, and/or blocks/operations may be omitted without departing from the scope of inventive concepts. Moreover, although some of the diagrams include arrows on communication paths to show a primary direction of communication, it is to be understood that communication may occur in the opposite direction to the depicted arrows.

[00125] Many variations and modifications can be made to the embodiments without substantially departing from the principles of the present inventive concepts. All such variations and modifications are intended to be included herein within the scope of present inventive concepts. Accordingly, the above disclosed subject matter is to be considered illustrative, and not restrictive, and the examples of embodiments are intended to cover all such modifications, enhancements, and other embodiments, which fall within the spirit and scope of present inventive concepts. Thus, to the maximum extent allowed by law, the scope of present inventive concepts are to be determined by the broadest permissible interpretation of the present disclosure including the examples of embodiments and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

[00126] Additional explanation is provided below.

[00127] Generally, all terms used herein are to be interpreted according to their ordinary meaning in the relevant technical field, unless a different meaning is clearly given and/or is implied from the context in which it is used. All references to a/an/the element, apparatus, component, means, step, etc. are to be interpreted openly as referring to at least one instance of the element, apparatus, component, means, step, etc., unless explicitly stated otherwise.

The steps of any methods disclosed herein do not have to be performed in the exact order disclosed, unless a step is explicitly described as following or preceding another step and/or where it is implicit that a step must follow or precede another step. Any feature of any of the embodiments disclosed herein may be applied to any other embodiment, wherever appropriate. Likewise, any advantage of any of the embodiments may apply to any other embodiments, and vice versa. Other objectives, features and advantages of the enclosed embodiments will be apparent from the following description.

[00128] Some of the embodiments contemplated herein will now be described more fully with reference to the accompanying drawings. Other embodiments, however, are contained within the scope of the subject matter disclosed herein, the disclosed subject matter should not be construed as limited to only the embodiments set forth herein; rather, these embodiments are provided by way of example to convey the scope of the subject matter to those skilled in the art.

[00129] FIG. 23 A wireless network in accordance with some embodiments.

[00130] Although the subject matter described herein may be implemented in any appropriate type of system using any suitable components, the embodiments disclosed herein are described in relation to a wireless network, such as the example wireless network illustrated in FIG. 23. For simplicity, the wireless network of FIG. 23 only depicts network QQ106, network nodes QQ160 and QQ160b, and WDs QQ110, QQllOb, and QQllOc (also referred to as mobile terminals). In practice, a wireless network may further include any additional elements suitable to support communication between wireless devices or between a wireless device and another communication device, such as a landline telephone, a service provider, or any other network node or end device. Of the illustrated components, network node QQ160 and wireless device (WD) QQ110 are depicted with additional detail. The wireless network may provide communication and other types of services to one or more wireless

devices to facilitate the wireless devices' access to and/or use of the services provided by, or via, the wireless network.

[00131 ] The wireless network may comprise and/or interface with any type of communication, telecommunication, data, cellular, and/or radio network or other similar type of system. In some embodiments, the wireless network may be configured to operate according to specific standards or other types of predefined rules or procedures. Thus, particular embodiments of the wireless network may implement communication standards, such as Global System for Mobile Communications (GSM), Universal Mobile

Telecommunications System (UMTS), Long Term Evolution (LTE), and/or other suitable 2G, SG, 4G, or 5G standards; wireless local area network (WLAN) standards, such as the IEEE 802.11 standards; and/or any other appropriate wireless communication standard, such as the

Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, Z-Wave and/or ZigBee standards.

[00132] Network QQ106 may comprise one or more backhaul networks, core networks,

IP networks, public switched telephone networks (PSTNs), packet data networks, optical networks, wide-area networks (WANs), local area networks (LANs), wireless local area networks (WLANs), wired networks, wireless networks, metropolitan area networks, and other networks to enable communication between devices.

[00133] Network node QQ160 and WD QQ110 comprise various components described in more detail below. These components work together in order to provide network node and/or wireless device functionality, such as providing wireless connections in a wireless network. In different embodiments, the wireless network may comprise any number of wired or wireless networks, network nodes, base stations, controllers, wireless devices, relay stations, and/or any other components or systems that may facilitate or participate in the

communication of data and/or signals whether via wired or wireless connections.

[00134] As used herein, network node refers to equipment capable, configured, arranged and/or operable to communicate directly or indirectly with a wireless device and/or with other network nodes or equipment in the wireless network to enable and/or provide wireless access to the wireless device and/or to perform other functions (e.g., administration) in the wireless network. Examples of network nodes include, but are not limited to, access points (APs) (e.g., radio access points), base stations (BSs) (e.g., radio base stations, Node Bs, evolved Node Bs (eNBs) and NR NodeBs (gNBs)). Base stations may be categorized based on the amount of coverage they provide (or, stated differently, their transmit power level) and may then also be referred to as femto base stations, pico base stations, micro base stations, or macro base stations. A base station may be a relay node or a relay donor node controlling a relay. A network node may also include one or more (or all) parts of a distributed radio base station such as centralized digital units and/or remote radio units (RRUs), sometimes referred to as Remote Radio Heads (RRHs). Such remote radio units may or may not be integrated with an antenna as an antenna integrated radio. Parts of a distributed radio base station may also be referred to as nodes in a distributed antenna system (DAS). Yet further examples of network nodes include multi-standard radio (MSR) equipment such as MSR BSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes, multi-cell/multicast coordination entities (MCEs), core network nodes (e.g., MSCs, MMEs), O&M nodes, OSS nodes, SON nodes, positioning nodes (e.g., E-SMLCs), and/or MDTs. As another example, a network node may be a virtual network node as described in more detail below. More generally, however, network nodes may represent any suitable device (or group of devices) capable, configured, arranged, and/or operable to enable and/or provide a wireless device with access to the wireless network or to provide some service to a wireless device that has accessed the wireless network.

[00135] In FIG. 23, network node QQ160 includes processing circuitry QQ170, device readable medium QQ180, interface QQ190, auxiliary equipment QQ184, power source QQ186, power circuitry QQ187, and antenna QQ162. Although network node QQ160 illustrated in the example wireless network of FIG. 23 may represent a device that includes the illustrated combination of hardware components, other embodiments may comprise network nodes with different combinations of components. It is to be understood that a network node comprises any suitable combination of hardware and/or software needed to perform the tasks, features, functions and methods disclosed herein. Moreover, while the components of network node QQ160 are depicted as single boxes located within a larger box, or nested within multiple boxes, in practice, a network node may comprise multiple different physical components that make up a single illustrated component (e.g., device readable medium QQ180 may comprise multiple separate hard drives as well as multiple RAM modules).

[00136] Similarly, network node QQ160 may be composed of multiple physically separate components (e.g., a NodeB component and a RNC component, or a BTS component and a BSC component, etc.), which may each have their own respective components. In certain scenarios in which network node QQ160 comprises multiple separate components (e.g., BTS and BSC components), one or more of the separate components may be shared among several network nodes. For example, a single RNC may control multiple NodeB's. In such a scenario, each unique NodeB and RNC pair, may in some instances be considered a single separate network node. In some embodiments, network node QQ160 may be configured to support multiple radio access technologies (RATs). In such embodiments, some components may be duplicated (e.g., separate device readable medium QQ180 for the different RATs) and some components may be reused (e.g., the same antenna QQ162 may be shared by the RATs). Network node QQ160 may also include multiple sets of the various illustrated components for different wireless technologies integrated into network node QQ160, such as, for example, GSM, WCDMA, LTE, NR, WiFi, or Bluetooth wireless technologies. These wireless technologies may be integrated into the same or different chip or set of chips and other components within network node QQ160.

[00137] Processing circuitry QQ170 is configured to perform any determining, calculating, or similar operations (e.g., certain obtaining operations) described herein as being provided by a network node. These operations performed by processing circuitry QQ170 may include processing information obtained by processing circuitry QQ170 by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored in the network node, and/or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination.

[00138] Processing circuitry QQ170 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application-specific integrated circuit, field programmable gate array, or any other suitable computing device, resource, or combination of hardware, software and/or encoded logic operable to provide, either alone or in conjunction with other network node QQ160

components, such as device readable medium QQ180, network node QQ160 functionality. For example, processing circuitry QQ170 may execute instructions stored in device readable medium QQ180 or in memory within processing circuitry QQ170. Such functionality may include providing any of the various wireless features, functions, or benefits discussed herein.

In some embodiments, processing circuitry QQ170 may include a system on a chip (SOC).

[00139] In some embodiments, processing circuitry QQ170 may include one or more of radio frequency (RF) transceiver circuitry QQ172 and baseband processing circuitry QQ174. In some embodiments, radio frequency (RF) transceiver circuitry QQ172 and baseband processing circuitry QQ174 may be on separate chips (or sets of chips), boards, or units, such as radio units and digital units. In alternative embodiments, part or all of RF transceiver circuitry QQ172 and baseband processing circuitry QQ174 may be on the same chip or set of chips, boards, or units.

[00140] In certain embodiments, some or all of the functionality described herein as being provided by a network node, base station, eNB or other such network device may be performed by processing circuitry QQ170 executing instructions stored on device readable medium QQ180 or memory within processing circuitry QQ170. In alternative embodiments, some or all of the functionality may be provided by processing circuitry QQ170 without executing instructions stored on a separate or discrete device readable medium, such as in a hard-wired manner. In any of those embodiments, whether executing instructions stored on a device readable storage medium or not, processing circuitry QQ170 can be configured to perform the described functionality. The benefits provided by such functionality are not limited to processing circuitry QQ170 alone or to other components of network node QQ160, but are enjoyed by network node QQ160 as a whole, and/or by end users and the wireless network generally.

[00141 ] Device readable medium QQ180 may comprise any form of volatile or non volatile computer readable memory including, without limitation, persistent storage, solid-state memory, remotely mounted memory, magnetic media, optical media, random access memory

(RAM), read-only memory (ROM), mass storage media (for example, a hard disk), removable storage media (for example, a flash drive, a Compact Disk (CD) or a Digital Video Disk (DVD)), and/or any other volatile or non-volatile, non-transitory device readable and/or computer-executable memory devices that store information, data, and/or instructions that may be used by processing circuitry QQ170. Device readable medium QQ180 may store any suitable instructions, data or information, including a computer program, software, an application including one or more of logic, rules, code, tables, etc. and/or other instructions capable of being executed by processing circuitry QQ170 and, utilized by network node QQ160. Device readable medium QQ180 may be used to store any calculations made by processing circuitry QQ170 and/or any data received via interface QQ190. In some embodiments, processing circuitry QQ170 and device readable medium QQ180 may be considered to be integrated.

[00142] Interface QQ190 is used in the wired or wireless communication of signalling and/or data between network node QQ160, network QQ106, and/or WDs QQ110. As illustrated, interface QQ190 comprises port(s)/terminal(s) QQ194 to send and receive data, for example to and from network QQ106 over a wired connection. Interface QQ190 also includes radio front end circuitry QQ192 that may be coupled to, or in certain embodiments a part of, antenna QQ162. Radio front end circuitry QQ192 comprises filters QQ198 and amplifiers QQ196. Radio front end circuitry QQ192 may be connected to antenna QQ162 and processing circuitry QQ170. Radio front end circuitry may be configured to condition signals

communicated between antenna QQ162 and processing circuitry QQ170. Radio front end circuitry QQ192 may receive digital data that is to be sent out to other network nodes or WDs via a wireless connection. Radio front end circuitry QQ192 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters QQ198 and/or amplifiers QQ196. The radio signal may then be transmitted via antenna QQ162. Similarly, when receiving data, antenna QQ162 may collect radio signals which are then converted into digital data by radio front end circuitry QQ192. The digital data may be passed to processing circuitry QQ170. In other embodiments, the interface may comprise different components and/or different combinations of components.

[00143] In certain alternative embodiments, network node QQ160 may not include separate radio front end circuitry QQ192, instead, processing circuitry QQ170 may comprise radio front end circuitry and may be connected to antenna QQ162 without separate radio front end circuitry QQ192. Similarly, in some embodiments, all or some of RF transceiver circuitry QQ172 may be considered a part of interface QQ190. In still other embodiments, interface QQ190 may include one or more ports or terminals QQ194, radio front end circuitry QQ192, and RF transceiver circuitry QQ172, as part of a radio unit (not shown), and interface QQ190 may communicate with baseband processing circuitry QQ174, which is part of a digital unit (not shown).

[00144] Antenna QQ162 may include one or more antennas, or antenna arrays, configured to send and/or receive wireless signals. Antenna QQ162 may be coupled to radio front end circuitry QQ190 and may be any type of antenna capable of transmitting and receiving data and/or signals wirelessly. In some embodiments, antenna QQ162 may comprise one or more omni-directional, sector or panel antennas operable to transmit/receive radio signals between, for example, 2 GHz and 66 GHz. An omni-directional antenna may be used to transmit/receive radio signals in any direction, a sector antenna may be used to

transmit/receive radio signals from devices within a particular area, and a panel antenna may be a line of sight antenna used to transmit/receive radio signals in a relatively straight line. In some instances, the use of more than one antenna may be referred to as MIMO. In certain embodiments, antenna QQ162 may be separate from network node QQ160 and may be connectable to network node QQ160 through an interface or port.

[00145] Antenna QQ162, interface QQ190, and/or processing circuitry QQ170 may be configured to perform any receiving operations and/or certain obtaining operations described herein as being performed by a network node. Any information, data and/or signals may be received from a wireless device, another network node and/or any other network equipment. Similarly, antenna QQ162, interface QQ190, and/or processing circuitry QQ170 may be configured to perform any transmitting operations described herein as being performed by a network node. Any information, data and/or signals may be transmitted to a wireless device, another network node and/or any other network equipment.

[00146] Power circuitry QQ187 may comprise, or be coupled to, power management circuitry and is configured to supply the components of network node QQ160 with power for performing the functionality described herein. Power circuitry QQ187 may receive power from power source QQ186. Power source QQ186 and/or power circuitry QQ187 may be configured to provide power to the various components of network node QQ160 in a form suitable for the respective components (e.g., at a voltage and current level needed for each respective component). Power source QQ186 may either be included in, or external to, power circuitry QQ187 and/or network node QQ160. For example, network node QQ160 may be connectable to an external power source (e.g., an electricity outlet) via an input circuitry or interface such as an electrical cable, whereby the external power source supplies power to power circuitry QQ187. As a further example, power source QQ186 may comprise a source of power in the form of a battery or battery pack which is connected to, or integrated in, power circuitry QQ187. The battery may provide backup power should the external power source fail. Other types of power sources, such as photovoltaic devices, may also be used.

[00147] Alternative embodiments of network node QQ160 may include additional components beyond those shown in FIG. 23 that may be responsible for providing certain aspects of the network node's functionality, including any of the functionality described herein and/or any functionality necessary to support the subject matter described herein. For example, network node QQ160 may include user interface equipment to allow input of information into network node QQ160 and to allow output of information from network node QQ160. This may allow a user to perform diagnostic, maintenance, repair, and other administrative functions for network node QQ160.

[00148] As used herein, wireless device (WD) refers to a device capable, configured, arranged and/or operable to communicate wirelessly with network nodes and/or other wireless devices. Unless otherwise noted, the term WD may be used interchangeably herein with user equipment (UE). Communicating wirelessly may involve transmitting and/or receiving wireless signals using electromagnetic waves, radio waves, infrared waves, and/or other types of signals suitable for conveying information through air. In some embodiments, a WD may be configured to transmit and/or receive information without direct human interaction. For

instance, a WD may be designed to transmit information to a network on a predetermined schedule, when triggered by an internal or external event, or in response to requests from the network. Examples of a WD include, but are not limited to, a smart phone, a mobile phone, a cell phone, a voice over IP (VoIP) phone, a wireless local loop phone, a desktop computer, a personal digital assistant (PDA), a wireless cameras, a gaming console or device, a music storage device, a playback appliance, a wearable terminal device, a wireless endpoint, a mobile station, a tablet, a laptop, a laptop-embedded equipment (LEE), a laptop-mounted equipment (LME), a smart device, a wireless customer-premise equipment (CPE) a vehicle-mounted wireless terminal device, etc. A WD may support device-to-device (D2D) communication, for example by implementing a 3GPP standard for sidelink communication, vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-everything (V2X) and may in this case be referred to as a D2D communication device. As yet another specific example, in an Internet of Things (loT) scenario, a WD may represent a machine or other device that performs monitoring and/or

measurements, and transmits the results of such monitoring and/or measurements to another WD and/or a network node. The WD may in this case be a machine-to-machine (M2M) device, which may in a 3GPP context be referred to as an MTC device. As one particular example, the WD may be a UE implementing the 3GPP narrow band internet of things (NB-loT) standard. Particular examples of such machines or devices are sensors, metering devices such as power meters, industrial machinery, or home or personal appliances (e.g. refrigerators, televisions, etc.) personal wearables (e.g., watches, fitness trackers, etc.). In other scenarios, a WD may represent a vehicle or other equipment that is capable of monitoring and/or reporting on its operational status or other functions associated with its operation. A WD as described above may represent the endpoint of a wireless connection, in which case the device may be referred to as a wireless terminal. Furthermore, a WD as described above may be mobile, in which case it may also be referred to as a mobile device or a mobile terminal.

[00149] As illustrated, wireless device QQ110 includes antenna QQ111, interface QQ114, processing circuitry QQ120, device readable medium QQ130, user interface equipment QQ132, auxiliary equipment QQ134, power source QQ136 and power circuitry QQ137. WD QQ110 may include multiple sets of one or more of the illustrated components for different wireless

technologies supported by WD QQ110, such as, for example, GSM, WCDMA, LTE, NR, WiFi, WiMAX, or Bluetooth wireless technologies, just to mention a few. These wireless technologies may be integrated into the same or different chips or set of chips as other components within WD QQ110.

[00150] Antenna QQ111 may include one or more antennas or antenna arrays, configured to send and/or receive wireless signals, and is connected to interface QQ114. In certain alternative embodiments, antenna QQ111 may be separate from WD QQ110 and be connectable to WD QQ110 through an interface or port. Antenna QQ111, interface QQ114, and/or processing circuitry QQ120 may be configured to perform any receiving or transmitting operations described herein as being performed by a WD. Any information, data and/or signals may be received from a network node and/or another WD. In some embodiments, radio front end circuitry and/or antenna QQ111 may be considered an interface.

[00151 ] As illustrated, interface QQ114 comprises radio front end circuitry QQ112 and antenna QQ111. Radio front end circuitry QQ112 comprise one or more filters QQ118 and amplifiers QQ116. Radio front end circuitry QQ114 is connected to antenna QQ111 and processing circuitry QQ120, and is configured to condition signals communicated between antenna QQ111 and processing circuitry QQ120. Radio front end circuitry QQ112 may be coupled to or a part of antenna QQ111. In some embodiments, WD QQ110 may not include separate radio front end circuitry QQ112; rather, processing circuitry QQ120 may comprise radio front end circuitry and may be connected to antenna QQ111. Similarly, in some embodiments, some or all of RF transceiver circuitry QQ122 may be considered a part of interface QQ114. Radio front end circuitry QQ112 may receive digital data that is to be sent out to other network nodes or WDs via a wireless connection. Radio front end circuitry QQ112 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters QQ118 and/or amplifiers QQ116. The radio signal may then be transmitted via antenna QQ111. Similarly, when receiving data, antenna QQ111 may collect radio signals which are then converted into digital data by radio front end circuitry QQ112. The digital data may be passed to processing circuitry QQ120. In other embodiments,

the interface may comprise different components and/or different combinations of components.

[00152] Processing circuitry QQ120 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application-specific integrated circuit, field programmable gate array, or any other suitable computing device, resource, or combination of hardware, software, and/or encoded logic operable to provide, either alone or in conjunction with other WD QQ110 components, such as device readable medium QQ130, WD QQ110 functionality. Such functionality may include providing any of the various wireless features or benefits discussed herein. For example, processing circuitry QQ120 may execute instructions stored in device readable medium QQ130 or in memory within processing circuitry QQ120 to provide the functionality disclosed herein.

[00153] As illustrated, processing circuitry QQ120 includes one or more of RF transceiver circuitry QQ122, baseband processing circuitry QQ124, and application processing circuitry QQ126. In other embodiments, the processing circuitry may comprise different components and/or different combinations of components. In certain embodiments processing circuitry QQ120 of WD QQ110 may comprise a SOC. In some embodiments, RF transceiver circuitry QQ122, baseband processing circuitry QQ124, and application processing circuitry QQ126 may be on separate chips or sets of chips. In alternative embodiments, part or all of baseband processing circuitry QQ124 and application processing circuitry QQ126 may be combined into one chip or set of chips, and RF transceiver circuitry QQ122 may be on a separate chip or set of chips. In still alternative embodiments, part or all of RF transceiver circuitry QQ122 and baseband processing circuitry QQ124 may be on the same chip or set of chips, and application processing circuitry QQ126 may be on a separate chip or set of chips. In yet other alternative embodiments, part or all of RF transceiver circuitry QQ122, baseband processing circuitry QQ124, and application processing circuitry QQ126 may be combined in the same chip or set of chips. In some embodiments, RF transceiver circuitry QQ122 may be a part of interface QQ114. RF transceiver circuitry QQ122 may condition RF signals for processing circuitry QQ120.

[00154] In certain embodiments, some or all of the functionality described herein as being performed by a WD may be provided by processing circuitry QQ120 executing

instructions stored on device readable medium QQ130, which in certain embodiments may be a computer-readable storage medium. In alternative embodiments, some or all of the

functionality may be provided by processing circuitry QQ120 without executing instructions stored on a separate or discrete device readable storage medium, such as in a hard-wired manner. In any of those particular embodiments, whether executing instructions stored on a device readable storage medium or not, processing circuitry QQ120 can be configured to perform the described functionality. The benefits provided by such functionality are not limited to processing circuitry QQ120 alone or to other components of WD QQ110, but are enjoyed by WD QQ110 as a whole, and/or by end users and the wireless network generally.

[00155] Processing circuitry QQ120 may be configured to perform any determining, calculating, or similar operations (e.g., certain obtaining operations) described herein as being performed by a WD. These operations, as performed by processing circuitry QQ120, may include processing information obtained by processing circuitry QQ120 by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored by WD QQ110, and/or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination.

[00156] Device readable medium QQ130 may be operable to store a computer program, software, an application including one or more of logic, rules, code, tables, etc. and/or other instructions capable of being executed by processing circuitry QQ120. Device readable medium QQ130 may include computer memory (e.g., Random Access Memory (RAM) or Read Only Memory (ROM)), mass storage media (e.g., a hard disk), removable storage media (e.g., a Compact Disk (CD) or a Digital Video Disk (DVD)), and/or any other volatile or non-volatile, non-transitory device readable and/or computer executable memory devices that store information, data, and/or instructions that may be used by processing circuitry QQ120. In some

embodiments, processing circuitry QQ120 and device readable medium QQ130 may be considered to be integrated. User interface equipment QQ132 may provide components that allow for a human user to interact with WD QQ110. Such interaction may be of many forms, such as visual, audial, tactile, etc. User interface equipment QQ132 may be operable to

produce output to the user and to allow the user to provide input to WD QQ110. The type of interaction may vary depending on the type of user interface equipment QQ132 installed in WD QQ110. For example, if WD QQ110 is a smart phone, the interaction may be via a touch screen; if WD QQ110 is a smart meter, the interaction may be through a screen that provides usage (e.g., the number of gallons used) or a speaker that provides an audible alert (e.g., if smoke is detected). User interface equipment QQ132 may include input interfaces, devices and circuits, and output interfaces, devices and circuits. User interface equipment QQ132 is configured to allow input of information into WD QQ110, and is connected to processing circuitry QQ120 to allow processing circuitry QQ120 to process the input information. User interface equipment QQ132 may include, for example, a microphone, a proximity or other sensor, keys/buttons, a touch display, one or more cameras, a USB port, or other input circuitry. User interface equipment QQ132 is also configured to allow output of information from WD QQ110, and to allow processing circuitry QQ120 to output information from WD QQ110. User interface equipment QQ132 may include, for example, a speaker, a display, vibrating circuitry, a USB port, a headphone interface, or other output circuitry. Using one or more input and output interfaces, devices, and circuits, of user interface equipment QQ132, WD QQ110 may communicate with end users and/or the wireless network, and allow them to benefit from the functionality described herein.

[00157] Auxiliary equipment QQ134 is operable to provide more specific functionality which may not be generally performed by WDs. This may comprise specialized sensors for doing measurements for various purposes, interfaces for additional types of communication such as wired communications etc. The inclusion and type of components of auxiliary equipment QQ134 may vary depending on the embodiment and/or scenario.

[00158] Power source QQ136 may, in some embodiments, be in the form of a battery or battery pack. Other types of power sources, such as an external power source (e.g., an electricity outlet), photovoltaic devices or power cells, may also be used. WD QQ110 may further comprise power circuitry QQ137 for delivering power from power source QQ136 to the various parts of WD QQ110 which need power from power source QQ136 to carry out any functionality described or indicated herein. Power circuitry QQ137 may in certain

embodiments comprise power management circuitry. Power circuitry QQ137 may additionally or alternatively be operable to receive power from an external power source; in which case WD QQ110 may be connectable to the external power source (such as an electricity outlet) via input circuitry or an interface such as an electrical power cable. Power circuitry QQ137 may also in certain embodiments be operable to deliver power from an external power source to power source QQ136. This may be, for example, for the charging of power source QQ136. Power circuitry QQ137 may perform any formatting, converting, or other modification to the power from power source QQ136 to make the power suitable for the respective components of WD QQ110 to which power is supplied.

[00159] FIG. 24: User Equipment in accordance with some embodiments

[00160] FIG. 24 illustrates one embodiment of a UE in accordance with various aspects described herein. As used herein, a user equipment or UE may not necessarily have a user in the sense of a human user who owns and/or operates the relevant device. Instead, a UE may represent a device that is intended for sale to, or operation by, a human user but which may not, or which may not initially, be associated with a specific human user (e.g., a smart sprinkler controller). Alternatively, a UE may represent a device that is not intended for sale to, or operation by, an end user but which may be associated with or operated for the benefit of a user (e.g., a smart power meter). UE QQ2200 may be any UE identified by the 3rd Generation Partnership Project (3GPP), including a NB-loT UE, a machine type communication (MTC) UE, and/or an enhanced MTC (eMTC) UE. UE QQ200, as illustrated in FIG. 24, is one example of a WD configured for communication in accordance with one or more communication standards promulgated by the 3rd Generation Partnership Project (3GPP), such as 3GPP's GSM, UMTS,

LTE, and/or 5G standards. As mentioned previously, the term WD and UE may be used interchangeable. Accordingly, although FIG. 24 is a UE, the components discussed herein are equally applicable to a WD, and vice-versa.

[00161 ] In FIG. 24, UE QQ200 includes processing circuitry QQ201 that is operatively coupled to input/output interface QQ205, radio frequency (RF) interface QQ209, network connection interface QQ211, memory QQ215 including random access memory (RAM) QQ217, read-only memory (ROM) QQ219, and storage medium QQ221 or the like, communication

subsystem QQ231, power source QQ233, and/or any other component, or any combination thereof. Storage medium QQ221 includes operating system QQ223, application program QQ225, and data QQ227. In other embodiments, storage medium QQ221 may include other similar types of information. Certain UEs may utilize all of the components shown in FIG. 24, or only a subset of the components. The level of integration between the components may vary from one UE to another UE. Further, certain UEs may contain multiple instances of a component, such as multiple processors, memories, transceivers, transmitters, receivers, etc.

[00162] In FIG. 24, processing circuitry QQ201 may be configured to process computer instructions and data. Processing circuitry QQ201 may be configured to implement any sequential state machine operative to execute machine instructions stored as machine-readable computer programs in the memory, such as one or more hardware-implemented state machines (e.g., in discrete logic, FPGA, ASIC, etc.); programmable logic together with appropriate firmware; one or more stored program, general-purpose processors, such as a microprocessor or Digital Signal Processor (DSP), together with appropriate software; or any combination of the above. For example, the processing circuitry QQ201 may include two central processing units (CPUs). Data may be information in a form suitable for use by a computer.

[00163] In the depicted embodiment, input/output interface QQ205 may be configured to provide a communication interface to an input device, output device, or input and output device. UE QQ200 may be configured to use an output device via input/output interface QQ205. An output device may use the same type of interface port as an input device. For example, a USB port may be used to provide input to and output from UE QQ200. The output device may be a speaker, a sound card, a video card, a display, a monitor, a printer, an actuator, an emitter, a smartcard, another output device, or any combination thereof. UE QQ200 may be configured to use an input device via input/output interface QQ205 to allow a user to capture information into UE QQ200. The input device may include a touch-sensitive or presence-sensitive display, a camera (e.g., a digital camera, a digital video camera, a web camera, etc.), a microphone, a sensor, a mouse, a trackball, a directional pad, a trackpad, a scroll wheel, a smartcard, and the like. The presence-sensitive display may include a capacitive or resistive touch sensor to sense input from a user. A sensor may be, for instance, an accelerometer, a gyroscope, a tilt sensor, a force sensor, a magnetometer, an optical sensor, a proximity sensor, another like sensor, or any combination thereof. For example, the input device may be an accelerometer, a magnetometer, a digital camera, a microphone, and an optical sensor.

[00164] In FIG. 24, RF interface QQ209 may be configured to provide a communication interface to RF components such as a transmitter, a receiver, and an antenna. Network connection interface QQ211 may be configured to provide a communication interface to network QQ243a. Network QQ243a may encompass wired and/or wireless networks such as a local-area network (LAN), a wide-area network (WAN), a computer network, a wireless network, a telecommunications network, another like network or any combination thereof. For example, network QQ243a may comprise a Wi-Fi network. Network connection interface QQ211 may be configured to include a receiver and a transmitter interface used to

communicate with one or more other devices over a communication network according to one or more communication protocols, such as Ethernet, TCP/IP, SONET, ATM, or the like. Network connection interface QQ211 may implement receiver and transmitter functionality appropriate to the communication network links (e.g., optical, electrical, and the like). The transmitter and receiver functions may share circuit components, software or firmware, or alternatively may be implemented separately.

[00165] RAM QQ217 may be configured to interface via bus QQ202 to processing circuitry QQ201 to provide storage or caching of data or computer instructions during the execution of software programs such as the operating system, application programs, and device drivers. ROM QQ219 may be configured to provide computer instructions or data to processing circuitry QQ201. For example, ROM QQ219 may be configured to store invariant low-level system code or data for basic system functions such as basic input and output (I/O), startup, or reception of keystrokes from a keyboard that are stored in a non-volatile memory. Storage medium QQ221 may be configured to include memory such as RAM, ROM, programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic disks, optical disks, floppy disks, hard disks, removable cartridges, or flash drives. In one example, storage medium

QQ221 may be configured to include operating system QQ223, application program QQ225 such as a web browser application, a widget or gadget engine or another application, and data file QQ227. Storage medium QQ221 may store, for use by UE QQ200, any of a variety of various operating systems or combinations of operating systems.

[00166] Storage medium QQ221 may be configured to include a number of physical drive units, such as redundant array of independent disks (RAID), floppy disk drive, flash memory,

USB flash drive, external hard disk drive, thumb drive, pen drive, key drive, high-density digital versatile disc (HD-DVD) optical disc drive, internal hard disk drive, Blu-Ray optical disc drive, holographic digital data storage (HDDS) optical disc drive, external mini-dual in-line memory module (DIMM), synchronous dynamic random access memory (SDRAM), external micro-DIMM SDRAM, smartcard memory such as a subscriber identity module or a removable user identity (SIM/RUIM) module, other memory, or any combination thereof. Storage medium QQ221 may allow UE QQ200 to access computer-executable instructions, application programs or the like, stored on transitory or non-transitory memory media, to off-load data, or to upload data. An article of manufacture, such as one utilizing a communication system may be tangibly embodied in storage medium QQ221, which may comprise a device readable medium.

[00167] In FIG. 24, processing circuitry QQ201 may be configured to communicate with network QQ243b using communication subsystem QQ231. Network QQ243a and network QQ243b may be the same network or networks or different network or networks.

Communication subsystem QQ231 may be configured to include one or more transceivers used to communicate with network QQ243b. For example, communication subsystem QQ231 may be configured to include one or more transceivers used to communicate with one or more remote transceivers of another device capable of wireless communication such as another WD, UE, or base station of a radio access network (RAN) according to one or more communication protocols, such as IEEE 802.QQ2, CDMA, WCDMA, GSM, LTE, UTRAN, WiMax, or the like. Each transceiver may include transmitter QQ233 and/or receiver QQ235 to implement transmitter or receiver functionality, respectively, appropriate to the RAN links (e.g., frequency allocations and the like). Further, transmitter QQ233 and receiver QQ235 of each transceiver may share circuit components, software or firmware, or alternatively may be implemented separately.

[00168] In the illustrated embodiment, the communication functions of communication subsystem QQ231 may include data communication, voice communication, multimedia communication, short-range communications such as Bluetooth, near-field communication, location-based communication such as the use of the global positioning system (GPS) to determine a location, another like communication function, or any combination thereof. For example, communication subsystem QQ231 may include cellular communication, Wi-Fi communication, Bluetooth communication, and GPS communication. Network QQ243b may encompass wired and/or wireless networks such as a local-area network (LAN), a wide-area network (WAN), a computer network, a wireless network, a telecommunications network, another like network or any combination thereof. For example, network QQ243b may be a cellular network, a Wi-Fi network, and/or a near-field network. Power source QQ213 may be configured to provide alternating current (AC) or direct current (DC) power to components of UE QQ200.

[00169] The features, benefits and/or functions described herein may be implemented in one of the components of UE QQ200 or partitioned across multiple components of UE QQ200. Further, the features, benefits, and/or functions described herein may be implemented in any combination of hardware, software or firmware. In one example, communication subsystem QQ231 may be configured to include any of the components described herein. Further, processing circuitry QQ201 may be configured to communicate with any of such components over bus QQ202. In another example, any of such components may be represented by program instructions stored in memory that when executed by processing circuitry QQ201 perform the corresponding functions described herein. In another example, the functionality of any of such components may be partitioned between processing circuitry QQ201 and communication subsystem QQ231. In another example, the non-computationally intensive functions of any of such components may be implemented in software or firmware and the computationally intensive functions may be implemented in hardware.

[00170] FIG. 25: Virtualization environment in accordance with some embodiments [00171 ] FIG. 25 is a schematic block diagram illustrating a virtualization environment QQ300 in which functions implemented by some embodiments may be virtualized. In the

present context, virtualizing means creating virtual versions of apparatuses or devices which may include virtualizing hardware platforms, storage devices and networking resources. As used herein, virtualization can be applied to a node (e.g., a virtualized base station or a virtualized radio access node) or to a device (e.g., a UE, a wireless device or any other type of communication device) or components thereof and relates to an implementation in which at least a portion of the functionality is implemented as one or more virtual components (e.g., via one or more applications, components, functions, virtual machines or containers executing on one or more physical processing nodes in one or more networks).

[00172] In some embodiments, some or all of the functions described herein may be implemented as virtual components executed by one or more virtual machines implemented in one or more virtual environments QQ300 hosted by one or more of hardware nodes QQ330. Further, in embodiments in which the virtual node is not a radio access node or does not require radio connectivity (e.g., a core network node), then the network node may be entirely virtualized.

[00173] The functions may be implemented by one or more applications QQ320 (which may alternatively be called software instances, virtual appliances, network functions, virtual nodes, virtual network functions, etc.) operative to implement some of the features, functions, and/or benefits of some of the embodiments disclosed herein. Applications QQ320 are run in virtualization environment QQ300 which provides hardware QQ330 comprising processing circuitry QQ360 and memory QQ390. Memory QQ390 contains instructions QQ395 executable by processing circuitry QQ360 whereby application QQ320 is operative to provide one or more of the features, benefits, and/or functions disclosed herein.

[00174] Virtualization environment QQ300, comprises general-purpose or special-purpose network hardware devices QQ330 comprising a set of one or more processors or processing circuitry QQ360, which may be commercial off-the-shelf (COTS) processors, dedicated Application Specific Integrated Circuits (ASICs), or any other type of processing circuitry including digital or analog hardware components or special purpose processors. Each hardware device may comprise memory QQ390-1 which may be non-persistent memory for temporarily storing instructions QQ395 or software executed by processing circuitry QQ360.

Each hardware device may comprise one or more network interface controllers (NICs) QQ370, also known as network interface cards, which include physical network interface QQ380. Each hardware device may also include non-transitory, persistent, machine-readable storage media QQ390-2 having stored therein software QQ395 and/or instructions executable by processing circuitry QQ360. Software QQ395 may include any type of software including software for instantiating one or more virtualization layers QQ350 (also referred to as hypervisors), software to execute virtual machines QQ340 as well as software allowing it to execute functions, features and/or benefits described in relation with some embodiments described herein.

[00175] Virtual machines QQ340, comprise virtual processing, virtual memory, virtual networking or interface and virtual storage, and may be run by a corresponding virtualization layer QQ350 or hypervisor. Different embodiments of the instance of virtual appliance QQ320 may be implemented on one or more of virtual machines QQ340, and the implementations may be made in different ways.

[00176] During operation, processing circuitry QQ360 executes software QQ395 to instantiate the hypervisor or virtualization layer QQ350, which may sometimes be referred to as a virtual machine monitor (VMM). Virtualization layer QQ350 may present a virtual operating platform that appears like networking hardware to virtual machine QQ340.

[00177] As shown in FIG. 25, hardware QQ330 may be a standalone network node with generic or specific components. Hardware QQ330 may comprise antenna QQ3225 and may implement some functions via virtualization. Alternatively, hardware QQ330 may be part of a larger cluster of hardware (e.g. such as in a data center or customer premise equipment (CPE)) where many hardware nodes work together and are managed via management and

orchestration (MANO) QQ3100, which, among others, oversees lifecycle management of applications QQ320.

[00178] Virtualization of the hardware is in some contexts referred to as network function virtualization (NFV). NFV may be used to consolidate many network equipment types onto industry standard high volume server hardware, physical switches, and physical storage, which can be located in data centers, and customer premise equipment.

[00179] In the context of NFV, virtual machine QQ340 may be a software implementation of a physical machine that runs programs as if they were executing on a physical, non-virtualized machine. Each of virtual machines QQ340, and that part of hardware QQ330 that executes that virtual machine, be it hardware dedicated to that virtual machine and/or hardware shared by that virtual machine with others of the virtual machines QQ340, forms a separate virtual network elements (VNE).

[00180] Still in the context of NFV, Virtual Network Function (VNF) is responsible for handling specific network functions that run in one or more virtual machines QQ340 on top of hardware networking infrastructure QQ330 and corresponds to application QQ320 in FIG. 25.

[00181 ] In some embodiments, one or more radio units QQ3200 that each include one or more transmitters QQ3220 and one or more receivers QQ3210 may be coupled to one or more antennas QQ3225. Radio units QQ3200 may communicate directly with hardware nodes QQ330 via one or more appropriate network interfaces and may be used in combination with the virtual components to provide a virtual node with radio capabilities, such as a radio access node or a base station.

[00182] In some embodiments, some signalling can be effected with the use of control system QQ3230 which may alternatively be used for communication between the hardware nodes QQ330 and radio units QQ3200.

[00183] FIG. 26: Telecommunication network connected via an intermediate network to a host computer in accordance with some embodiments.

[00184] With reference to FIG. 26, in accordance with an embodiment, a communication system includes telecommunication network QQ410, such as a 3GPP-type cellular network, which comprises access network QQ411, such as a radio access network, and core network QQ414. Access network QQ411 comprises a plurality of base stations QQ412a, QQ412b, QQ412c, such as NBs, eNBs, gNBs or other types of wireless access points, each defining a corresponding coverage area QQ413a, QQ413b, QQ413c. Each base station QQ412a, QQ412b, QQ412c is connectable to core network QQ414 over a wired or wireless connection QQ415. A first UE QQ491 located in coverage area QQ413c is configured to wirelessly connect to, or be paged by, the corresponding base station QQ412c. A second UE QQ492 in coverage area

QQ413a is wirelessly connectable to the corresponding base station QQ412a. While a plurality of UEs QQ491, QQ492 are illustrated in this example, the disclosed embodiments are equally applicable to a situation where a sole UE is in the coverage area or where a sole UE is connecting to the corresponding base station QQ412.

[00185] Telecommunication network QQ410 is itself connected to host computer QQ430, which may be embodied in the hardware and/or software of a standalone server, a cloud-implemented server, a distributed server or as processing resources in a server farm. Host computer QQ430 may be under the ownership or control of a service provider, or may be operated by the service provider or on behalf of the service provider. Connections QQ421 and QQ422 between telecommunication network QQ410 and host computer QQ430 may extend directly from core network QQ414 to host computer QQ430 or may go via an optional intermediate network QQ420. Intermediate network QQ420 may be one of, or a combination of more than one of, a public, private or hosted network; intermediate network QQ420, if any, may be a backbone network or the Internet; in particular, intermediate network QQ420 may comprise two or more sub-networks (not shown).

[00186] The communication system of FIG. 26 as a whole enables connectivity between the connected UEs QQ491, QQ492 and host computer QQ430. The connectivity may be described as an over-the-top (OTT) connection QQ450. Host computer QQ430 and the connected UEs QQ491, QQ492 are configured to communicate data and/or signaling via OTT connection QQ450, using access network QQ411, core network QQ414, any intermediate network QQ420 and possible further infrastructure (not shown) as intermediaries. OTT connection QQ450 may be transparent in the sense that the participating communication devices through which OTT connection QQ450 passes are unaware of routing of uplink and downlink communications. For example, base station QQ412 may not or need not be informed about the past routing of an incoming downlink communication with data originating from host computer QQ430 to be forwarded (e.g., handed over) to a connected UE QQ491. Similarly, base station QQ412 need not be aware of the future routing of an outgoing uplink

communication originating from the UE QQ491 towards the host computer QQ430.

[00187] FIG. 27: Host computer communicating via a base station with a user equipment over a partially wireless connection in accordance with some embodiments.

[00188] Example implementations, in accordance with an embodiment, of the UE, base station and host computer discussed in the preceding paragraphs will now be described with reference to FIG. 27. In communication system QQ500, host computer QQ510 comprises hardware QQ515 including communication interface QQ516 configured to set up and maintain a wired or wireless connection with an interface of a different communication device of communication system QQ500. Host computer QQ510 further comprises processing circuitry QQ518, which may have storage and/or processing capabilities. In particular, processing circuitry QQ518 may comprise one or more programmable processors, application-specific integrated circuits, field programmable gate arrays or combinations of these (not shown) adapted to execute instructions. Host computer QQ510 further comprises software QQ511, which is stored in or accessible by host computer QQ510 and executable by processing circuitry QQ518. Software QQ511 includes host application QQ512. Host application QQ512 may be operable to provide a service to a remote user, such as UE QQ530 connecting via OTT connection QQ550 terminating at UE QQ530 and host computer QQ510. In providing the service to the remote user, host application QQ512 may provide user data which is transmitted using OTT connection QQ550.

[00189] Communication system QQ500 further includes base station QQ520 provided in a telecommunication system and comprising hardware QQ525 enabling it to communicate with host computer QQ510 and with UE QQ530. Hardware QQ525 may include communication interface QQ526 for setting up and maintaining a wired or wireless connection with an interface of a different communication device of communication system QQ500, as well as radio interface QQ527 for setting up and maintaining at least wireless connection QQ570 with UE QQ530 located in a coverage area (not shown in FIG. 27) served by base station QQ520. Communication interface QQ526 may be configured to facilitate connection QQ560 to host computer QQ510. Connection QQ560 may be direct or it may pass through a core network (not shown in FIG. 27) of the telecommunication system and/or through one or more intermediate networks outside the telecommunication system. In the embodiment shown, hardware QQ525

of base station QQ520 further includes processing circuitry QQ528, which may comprise one or more programmable processors, application-specific integrated circuits, field programmable gate arrays or combinations of these (not shown) adapted to execute instructions. Base station QQ520 further has software QQ521 stored internally or accessible via an external connection.

[00190] Communication system QQ500 further includes UE QQ530 already referred to.

Its hardware QQ535 may include radio interface QQ537 configured to set up and maintain wireless connection QQ570 with a base station serving a coverage area in which UE QQ530 is currently located. Hardware QQ535 of UE QQ530 further includes processing circuitry QQ538, which may comprise one or more programmable processors, application-specific integrated circuits, field programmable gate arrays or combinations of these (not shown) adapted to execute instructions. UE QQ530 further comprises software QQ531, which is stored in or accessible by UE QQ530 and executable by processing circuitry QQ538. Software QQ531 includes client application QQ532. Client application QQ532 may be operable to provide a service to a human or non-human user via UE QQ530, with the support of host computer QQ510. In host computer QQ510, an executing host application QQ512 may communicate with the executing client application QQ532 via OTT connection QQ550 terminating at UE QQ530 and host computer QQ510. In providing the service to the user, client application QQ532 may receive request data from host application QQ512 and provide user data in response to the request data. OTT connection QQ550 may transfer both the request data and the user data. Client application QQ532 may interact with the user to generate the user data that it provides.

[00191 ] It is noted that host computer QQ510, base station QQ520 and UE QQ530 illustrated in FIG. 27 may be similar or identical to host computer QQ430, one of base stations QQ412a, QQ412b, QQ412c and one of UEs QQ491, QQ492 of FIG. 26, respectively. This is to say, the inner workings of these entities may be as shown in FIG. 27 and independently, the surrounding network topology may be that of FIG. 26.

[00192] In FIG. 27, OTT connection QQ550 has been drawn abstractly to illustrate the communication between host computer QQ510 and UE QQ530 via base station QQ520, without explicit reference to any intermediary devices and the precise routing of messages via these devices. Network infrastructure may determine the routing, which it may be configured to hide from UE QQ530 or from the service provider operating host computer QQ510, or both. While OTT connection QQ550 is active, the network infrastructure may further take decisions by which it dynamically changes the routing (e.g., on the basis of load balancing consideration or reconfiguration of the network).

[00193] Wireless connection QQ570 between UE QQ530 and base station QQ520 is in accordance with the teachings of the embodiments described throughout this disclosure. One or more of the various embodiments may improve the performance of OTT services provided to UE QQ530 using OTT connection QQ550, in which wireless connection QQ570 forms the last segment. More precisely, the teachings of these embodiments may improve the deblock filtering for video processing and thereby provide benefits such as improved video encoding and/or decoding.

[00194] A measurement procedure may be provided for the purpose of monitoring data rate, latency and other factors on which the one or more embodiments improve. There may further be an optional network functionality for reconfiguring OTT connection QQ550 between host computer QQ510 and UE QQ530, in response to variations in the measurement results.

The measurement procedure and/or the network functionality for reconfiguring OTT connection QQ550 may be implemented in software QQ511 and hardware QQ515 of host computer QQ510 or in software QQ531 and hardware QQ535 of UE QQ530, or both. In embodiments, sensors (not shown) may be deployed in or in association with communication devices through which OTT connection QQ550 passes; the sensors may participate in the measurement procedure by supplying values of the monitored quantities exemplified above, or supplying values of other physical quantities from which software QQ511, QQ531 may compute or estimate the monitored quantities. The reconfiguring of OTT connection QQ550 may include message format, retransmission settings, preferred routing etc.; the reconfiguring need not affect base station QQ520, and it may be unknown or imperceptible to base station QQ520. Such procedures and functionalities may be known and practiced in the art. In certain embodiments, measurements may involve proprietary UE signaling facilitating host computer QQ510's measurements of throughput, propagation times, latency and the like. The measurements may be implemented in that software QQ511 and QQ531 causes messages to

be transmitted, in particular empty or 'dummy' messages, using OTT connection QQ550 while it monitors propagation times, errors etc.

[00195] FIG. 28: Methods implemented in a communication system including a host computer, a base station and a user equipment in accordance with some embodiments.

[00196] FIG. 28 is a flowchart illustrating a method implemented in a communication system, in accordance with one embodiment. The communication system includes a host computer, a base station and a UE which may be those described with reference to Figures QQ4 and QQ5. For simplicity of the present disclosure, only drawing references to FIG. 28 will be included in this section. In step QQ610, the host computer provides user data. In substep QQ611 (which may be optional) of step QQ610, the host computer provides the user data by executing a host application. In step QQ620, the host computer initiates a transmission carrying the user data to the UE. In step QQ630 (which may be optional), the base station transmits to the UE the user data which was carried in the transmission that the host computer initiated, in accordance with the teachings of the embodiments described throughout this disclosure. In step QQ640 (which may also be optional), the UE executes a client application associated with the host application executed by the host computer.

[00197] FIG. 29: Methods implemented in a communication system including a host computer, a base station and a user equipment in accordance with some embodiments.

[00198] FIG. 29 is a flowchart illustrating a method implemented in a communication system, in accordance with one embodiment. The communication system includes a host computer, a base station and a UE which may be those described with reference to Figures QQ4 and QQ5. For simplicity of the present disclosure, only drawing references to FIG. 29 will be included in this section. In step QQ710 of the method, the host computer provides user data.

In an optional substep (not shown) the host computer provides the user data by executing a host application. In step QQ720, the host computer initiates a transmission carrying the user data to the UE. The transmission may pass via the base station, in accordance with the teachings of the embodiments described throughout this disclosure. In step QQ730 (which may be optional), the UE receives the user data carried in the transmission.

[00199] FIG. BO: Methods implemented in a communication system including a host computer, a base station and a user equipment in accordance with some embodiments.

[00200] FIG. 30 is a flowchart illustrating a method implemented in a communication system, in accordance with one embodiment. The communication system includes a host computer, a base station and a UE which may be those described with reference to Figures QQ4 and QQ5. For simplicity of the present disclosure, only drawing references to FIG. 30 will be included in this section. In step QQ810 (which may be optional), the UE receives input data provided by the host computer. Additionally or alternatively, in step QQ820, the UE provides user data. In substep QQ821 (which may be optional) of step QQ820, the UE provides the user data by executing a client application. In substep QQ811 (which may be optional) of step QQ810, the UE executes a client application which provides the user data in reaction to the received input data provided by the host computer. In providing the user data, the executed client application may further consider user input received from the user. Regardless of the specific manner in which the user data was provided, the UE initiates, in substep QQ830 (which may be optional), transmission of the user data to the host computer. In step QQ840 of the method, the host computer receives the user data transmitted from the UE, in accordance with the teachings of the embodiments described throughout this disclosure.

[00201 ] FIG. 31: Methods implemented in a communication system including a host computer, a base station and a user equipment in accordance with some embodiments.

[00202] FIG. 31 is a flowchart illustrating a method implemented in a communication system, in accordance with one embodiment. The communication system includes a host computer, a base station and a UE which may be those described with reference to Figures QQ4 and QQ5. For simplicity of the present disclosure, only drawing references to FIG. 31 will be included in this section. In step QQ910 (which may be optional), in accordance with the teachings of the embodiments described throughout this disclosure, the base station receives user data from the UE. In step QQ920 (which may be optional), the base station initiates transmission of the received user data to the host computer. In step QQ930 (which may be optional), the host computer receives the user data carried in the transmission initiated by the base station.

[00203] Any appropriate steps, methods, features, functions, or benefits disclosed herein may be performed through one or more functional units or modules of one or more virtual apparatuses. Each virtual apparatus may comprise a number of these functional units. These functional units may be implemented via processing circuitry, which may include one or more microprocessor or microcontrollers, as well as other digital hardware, which may include digital signal processors (DSPs), special-purpose digital logic, and the like. The processing circuitry may be configured to execute program code stored in memory, which may include one or several types of memory such as read-only memory (ROM), random-access memory (RAM), cache memory, flash memory devices, optical storage devices, etc. Program code stored in memory includes program instructions for executing one or more telecommunications and/or data communications protocols as well as instructions for carrying out one or more of the techniques described herein. In some implementations, the processing circuitry may be used to cause the respective functional unit to perform corresponding functions according one or more embodiments.

[00204] The term unit may have conventional meaning in the field of electronics, electrical devices and/or electronic devices and may include, for example, electrical and/or electronic circuitry, devices, modules, processors, memories, logic solid state and/or discrete devices, computer programs or instructions for carrying out respective tasks, procedures, computations, outputs, and/or displaying functions, and so on, as such as those that are described herein.