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1. WO2007089660 - MULTI-VOLTAGE SYNCHRONOUS SYSTEMS

Publication Number WO/2007/089660
Publication Date 09.08.2007
International Application No. PCT/US2007/002296
International Filing Date 26.01.2007
IPC
G06F 11/00 2006.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
CPC
G06F 1/263
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
263Arrangements for using multiple switchable power supplies, e.g. battery and AC
G06F 1/3203
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
G06F 1/3296
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
3296by lowering the supply or operating voltage
G06F 11/0706
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
0706the processing taking place on a specific hardware platform or in a specific software environment
G06F 11/0793
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
0793Remedial or corrective actions
G06F 11/1405
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
14Error detection or correction of the data by redundancy in operation
1402Saving, restoring, recovering or retrying
1405at machine instruction level
Applicants
  • SEARETE LLC (AllExceptUS)
  • MANGIONE-SMITH, William, Henry [US]/[US] (UsOnly)
Inventors
  • MANGIONE-SMITH, William, Henry
Agents
  • COOK, Dale, R.
Priority Data
11/343,74531.01.2006US
11/343,92731.01.2006US
11/364,13028.02.2006US
11/364,13128.02.2006US
11/364,57328.02.2006US
11/384,23617.03.2006US
11/384,23717.03.2006US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) MULTI-VOLTAGE SYNCHRONOUS SYSTEMS
(FR) SYSTÈMES SYNCHRONES À TENSIONS MULTIPLES
Abstract
(EN) Embodiments include a system, a device, and a method. A computing system includes a synchronous circuit. The synchronous circuit includes a first subcircuit powered by a first power plane having a first power plane voltage and a second subcircuit powered by a second power plane having a second power plane voltage. The system also includes an error detector operable to detect an incidence of a computational error occurring in the first subcircuit. The system further includes a controller operable to change the first power plane voltage based upon the detected incidence of a computational error. The system may include a power supply operable to provide a selected one of at least two voltages to the first power plane in response to the controller.
(FR) L'invention concerne, dans des modes de réalisation, un système, un dispositif, et un procédé. Un système de calcul comporte un circuit synchrone, qui comporte un premier sous-circuit alimenté par un premier plan d'alimentation ayant une première tension et un second sous-circuit alimenté par un second plan d'alimentation ayant une seconde tension. Le système comporte également un détecteur d'erreurs destiné à détecter une incidence d'une erreur de calcul survenant dans le premier sous-circuit. Le système comporte en outre un contrôleur destiné à modifier la première tension de plan d'alimentation sur la base de l'incidence détectée d'une erreur de calcul. Le système peut comporter une alimentation électrique destinée à fournir une tension choisie parmi au moins deux tensions au premier plan d'alimentation en réponse au contrôleur.
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