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1. WO2021080673 - POWER DELIVERY NETWORK FOR CFET WITH BURIED POWER RAILS

Publication Number WO/2021/080673
Publication Date 29.04.2021
International Application No. PCT/US2020/047135
International Filing Date 20.08.2020
IPC
H01L 27/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H01L 23/528 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Layout of the interconnection structure
H01L 21/8238 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8238Complementary field-effect transistors, e.g. CMOS
H01L 27/092 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
08including only semiconductor components of a single kind
085including field-effect components only
088the components being field-effect transistors with insulated gate
092complementary MIS field-effect transistors
CPC
H01L 21/76877
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
H01L 21/76895
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76895Local interconnects; Local pads, as exemplified by patent document EP0896365
H01L 23/5226
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
5226Via connections in a multilevel interconnection structure
H01L 23/5283
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Geometry or; layout of the interconnection structure
5283Cross-sectional geometry
H01L 23/5286
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Geometry or; layout of the interconnection structure
5286Arrangements of power or ground buses
Applicants
  • TOKYO ELECTRON LIMITED [JP]/[JP]
  • TOKYO ELECTRON U.S. HOLDINGS, INC. [US]/[US] (JP)
Inventors
  • LIEBMANN, Lars
  • SMITH, Jeffrey
  • CHANEMOUGAME, Daniel
  • DEVILLIERS, Anton
Agents
  • MATHER, Joshua D.
Priority Data
16/659,25121.10.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) POWER DELIVERY NETWORK FOR CFET WITH BURIED POWER RAILS
(FR) RÉSEAU DE DISTRIBUTION DE PUISSANCE DE CFET DOTÉ DE RAILS D'ALIMENTATION ENTERRÉS
Abstract
(EN)
A semiconductor device includes a first power rail, a first power input structure, a circuit and a first middle-of-line rail. The first power rail is formed in a first rail opening within a first isolation trench on a substrate. The first power input structure is configured to connect with a first terminal of a power source that is external of the semiconductor device to receive electrical power from the power source. The circuit is formed, on the substrate, by layers between the first power rail and the first power input structure. The first middle-of-line rail is formed by one or more of the layers that form the circuit. The first middle-of-line rail is configured to deliver the electrical power from the first power input structure to the first power rail, and the first power rail provides the electrical power to the circuit for operation.
(FR)
L'invention concerne un dispositif à semi-conducteur comprenant un premier rail d'alimentation, une première structure d'entrée de puissance, un circuit et un premier rail de milieu de ligne. Le premier rail d'alimentation est formé dans une première ouverture de rail à l'intérieur d'une première tranchée d'isolation sur un substrat. La première structure d'entrée de puissance est conçue pour se connecter à une première borne d'une source d'alimentation externe au dispositif à semi-conducteur pour recevoir de la puissance électrique provenant de la source d'alimentation. Le circuit est formé, sur le substrat, par des couches entre le premier rail d'alimentation et la première structure d'entrée de puissance. Le premier rail de milieu de ligne est formé par une ou plusieurs des couches qui forment le circuit. Le premier rail de milieu de ligne est conçu pour délivrer la puissance électrique de la première structure d'entrée de puissance au premier rail d'alimentation, et le premier rail d'alimentation fournit la puissance électrique au circuit à des fins de fonctionnement.
Also published as
Latest bibliographic data on file with the International Bureau