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1. WO2021042088 - SWITCHED ENVELOPE TRACKING

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]

SWITCHED ENVELOPE TRACKING

BACKGROUND

[0001] Embodiments of the present disclosure relate to apparatuses and methods for switched envelope tracking.

[0002] Wireless communication systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, and broadcasts. In cellular communication, such as the 4th-generation (4G) Long Term Evolution (LTE) and the 5th-generation (5G) New Radio (NR), the 3rd Generation Partnership Project (3GPP) defines a protocol stack that includes a set of layers collectively referred to as layer 2: a Packet Data Convergence Protocol (PDCP) layer, a Radio Link Control (RLC) layer, and a Medium Access Control (MAC), from higher to lower in the stack. These lie above the physical layer (PHY) in the stack. PHY is also referred to as layer 1. Data to be transmitted may be generated by an application above the protocol stack, passed down through layer 2 processing to layer 1 processing, where it is ultimately transmitted over one or more antenna.

SUMMARY

[0003] Embodiments of apparatus and method for switched envelope tracking are disclosed herein.

[0004] In one example, a method for switched envelope tracking can include receiving an input signal representative of an intended transmission. The input signal can include a symbol. The method can also include receiving information regarding the symbol separately from the receiving the input signal. The method can further include selecting a processing path from at least two processing paths based on the information regarding the symbol. The method can additionally include processing the input signal based on the selected processing path to provide a control signal. The method can also include supplying the control signal to a power amplifier in parallel to a modified form of the input signal.

[0005] In another example, an apparatus for switched envelope tracking can include an envelope generator configured to receive an input signal representative of an intended transmission. The input signal can include a symbol. The apparatus can also include a controller configured to receive information regarding the symbol. The information regarding the symbol can be received separately from the input signal. The controller can also be configured to select a processing path from at least two processing paths based on the information regarding the symbol. The input signal can be processed based on the selected processing path to provide a control signal. The controller can be further configured to supply the control signal to a power amplifier in parallel to a modified form of the input signal.

[0006] In a further example, an RF chip can include a power amplifier and an envelope generator configured to receive an input signal representative of an intended transmission to be amplified in the power amplifier. The input signal can include a symbol. The RF chip can also include a controller configured to receive information regarding the symbol. The information regarding the symbol can be received separately from the input signal. The controller can also be configured to select a processing path from at least two processing paths based on the information regarding the symbol. The input signal can be processed based on the selected processing path to provide a control signal. The controller can be further configured to supply the control signal to the power amplifier. The RF can further include a digital to analog converter configured to convert the input signal from digital form to analog form and to provide the analog form of the input signal to the power amplifier.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, further serve to explain the principles of the present disclosure and to enable a person skilled in the pertinent art to make and use the present disclosure.

[0008] FIG. 1A illustrates a constant level power tracker.

[0009] FIG. IB illustrates a fast or real-time envelope tracker.

[0010] FIG. 1C illustrates a multi-level envelope tracker.

[0011] FIG. 2 illustrates a control scheme for switched envelope tracking, according to certain embodiments of the present disclosure.

[0012] FIG. 3 illustrates a system for switched envelope tracking, according to certain embodiments.

[0013] FIG. 4 illustrates a comparison of various tracking approaches, according to certain embodiments of the present disclosure.

[0014] FIG. 5 illustrates a method of switched envelope tracking, according to certain embodiments of the present disclosure.

[0015] FIG. 6 illustrates an example node, in which some aspects of the present disclosure may be implemented, according to certain embodiments of the present disclosure.

[0016] FIG. 7 illustrates a block diagram of an apparatus including a baseband chip, an RF chip, and a host chip, according to certain embodiments of the present disclosure.

[0017] FIG. 8 illustrates an example wireless network, in which some aspects of the present disclosure may be implemented, according to certain embodiments of the present disclosure.

[0018] Embodiments of the present disclosure will be described with reference to the accompanying drawings.

DETAILED DESCRIPTION

[0019] Although specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the pertinent art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the present disclosure. It will be apparent to a person skilled in the pertinent art that the present disclosure can also be employed in a variety of other applications.

[0020] It is noted that references in the specification to “one embodiment,” “an embodiment,” “an example embodiment,” “some embodiments,” “certain embodiments,” etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of a person skilled in the pertinent art to effect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.

[0021] In general, terminology may be understood at least in part from usage in context.

For example, the term “one or more” as used herein, depending at least in part upon context, may be used to describe any feature, structure, or characteristic in a singular sense or may be used to describe combinations of features, structures or characteristics in a plural sense. Similarly, terms, such as “a,” “an,” or “the,” again, may be understood to convey a singular usage or to convey a plural usage, depending at least in part upon context. In addition, the term “based on” may be understood as not necessarily intended to convey an exclusive set of factors and may, instead, allow for existence of additional factors not necessarily expressly described, again, depending at least in part on context.

[0022] Various aspects of wireless communication systems will now be described with reference to various apparatus and methods. These apparatus and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, modules, units, components, circuits, steps, operations, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, firmware, computer software, or any combination thereof. Whether such elements are implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system.

[0023] The techniques described herein may be used for various wireless communication networks, such as code division multiple access (CDMA) system, time division multiple access (TDMA) system, frequency division multiple access (FDMA) system, orthogonal frequency division multiple access (OFDMA) system, single-carrier frequency division multiple access (SC-FDMA) system, and other networks. The terms “network” and “system” are often used interchangeably. A CDMA network may implement a radio access technology (RAT), such as Universal Terrestrial Radio Access (UTRA), evolved UTRA (E-UTRA), CDMA 2000, etc. A TDMA network may implement a RAT, such as GSM. An OFDMA network may implement a RAT, such as LTE or NR. The techniques described herein may be used for the wireless networks and RATs mentioned above, as well as other wireless networks and RATs.

[0024] Orthogonal frequency division multiplexing (OFDM) is used, for example, in

OFDMA communication systems including 5G NR, to provide efficient modulation for wireless communications. In an OFDM transmitter, groups of bits to be transmitted are transformed into complex symbols and converted into a time-domain waveform using, for example, an inverse fast Fourier transform (IFFT). The resulting digital waveform can be converted to analog form, amplified, and transmitted over-the-air to a receiver.

[0025] FIG. 1A illustrates a constant level power tracker. In this approach, a digital front-end circuit (DFEC) 110 can include a crest factor reduction (CFR) circuit 120. CFR circuit 120 may be configured to reduce peak-to-average -power-ratio (PAPR) of a signal to be transmitted. A reduced PAPR may result in higher efficiency operation of the power amplifier.

[0026] A pre-DPD gain (PreDPDGain) amplifier 130 can provide amplification of the signal before it is provided to the digital pre-distorter (DPD) 140. Predistortion is a category of techniques that can be used to improve the linearity of radio transmitter amplifiers, such as a power amplifier. If the amplifier is not linear, the result can be an inaccurate representation of the input signal at the output. In order to account for such non-linearity, a pre-distorter may compensate for the non-linearity such that the input to the pre-distorter is accurately represented by the output of the power amplifier. Distortion in power amplifiers may have a number of factors including, but not limited to, the amount of power being used by the amplifier, with higher power levels typically resulting in greater distortion.

[0027] Meanwhile, the digitally pre-distorted version of the signal can be provided to a pre-digital-to-analog-con vers ion gain (PreDACGain) amplifier 150 to amplify the signal. A real and imaginary (IQ) digital- to- analog converter (DAC) 160 can convert the signal to analog and provide the analog version of the signal to the power amplifier (PA) 170. IQ DAC 160 can be included in a radio frequency (RF) - transmission (TX) chip 180.

[0028] The bias voltage Vcc for power amplifier 170 can be supplied by a switched mode power supply (SMPS) 192. The SMPS 192 may be a traditional SMPS or may alternatively be a multi-level ET tracker. A traditional SMPS may switch levels relatively slowly, whereas a multi level ET tracker may provide all the levels at the same time, thereby enabling a relatively fast switch in average power tracking (APT) mode. The Vcc level is controlled by Vcc level control 190 via RF front-end control interface (RFFE) commands (not shown). The Vcc level can be maintained constant within the symbol. It can be changed from symbol to symbol to track the power level. This approach is called APT. If Vcc is further lowered to improve the efficiency of power amplifier 170, and DPD 140 is used to compensate for the non-linearity of power amplifier 170, this approach can be referred to as enhanced power tracking (EPT). The output of the power amplifier can ultimately be one or more antenna 199.

[0029] The approach of FIG. 1A does not rely on envelope tracking (ET). Envelope tracking is a power tracking technology to increase power amplifier efficiency. A signal to be amplified by the power amplifier may be a complex waveform with a significant amount of bandwidth and variability. Suitable envelope tracking can permit the power amplifier to operate efficiently and suitably.

[0030] Envelope trackers can be designed to follow the signal envelope instantly and provide enough current for the envelope tracked power amplifier. Typically, the bandwidth of the envelope is 3 times that of the signal. For fifth-generation (5G) wireless communication, to support a signal with bandwidth up to 100 MHz, the envelope tracker typically tracks up to 150 MHz as a

single-sided signal. This bandwidth leads to various considerations in envelope tracker design. Those considerations may include trading efficiency for speed.

[0031] FIG. IB illustrates a fast or real-time envelope tracker. This can be referred to herein interchangeably as “fast” or “real-time,” because the envelope signal, sometimes simply referred to as the envelope, can be the absolute value of the original signal and consequently can precisely and instantaneously follow the original signal. This may contrast with a “slow” or “filtered” envelope signal (these terms may also be used interchangeably with one another herein), which may not change precisely and instantaneously with the original signal, even though it is based on, and forms an envelope of, the original signal. These may contrast with a multi-level envelope which, though not necessarily filtered, may still only track the original signal periodically. As mentioned below, filtering can be applied to a multi-level envelope as well, which can yield a slow or filtered envelope signal.

[0032] As shown in FIG. IB, DFEC 110 can include CFR circuit 120, as in FIG. 1A.

PreDPDGain amplifier 130 can provide amplification of the signal before it is provided to DPD 140. An ET path element 194 can read the signal either before or after digital pre-distortion, or optionally both. ET path element 194 may provide a fast or real-time tracked version of the signal to an envelope DAC (ENV DAC) 165. The analog output of ENV DAC 165 can be provided to a continuous envelope tracker 196. In turn, continuous envelope tracker 196 can provide a higher amperage version of the analog version of the fast-tracked or real-time envelope track to power amplifier 170.

[0033] Meanwhile, as also shown in FIG. IB, the digitally pre-distorted version of the signal can be provided to a PreDACGain amplifier 150 to amplify the signal. An IQ DAC 160 can convert the signal to analog and provide the analog version of the signal to the power amplifier 170. Both IQ DAC 160 and ENV DAC 165 can be included in an RF- TX chip 180. The output of the power amplifier can ultimately be one or more antenna 199.

[0034] FIG. 1C illustrates a multi-level envelope tracker. As shown in FIG. 1C, DFEC 110 can include CFR circuit 120 providing a crest factor reduced signal to PreDPDGain amplifier 130. The output of PreDPDGain amplifier 130 can be provided to a multi-level generator 197 as well as a DPD 140, which may be a two-dimensional (2D) DPD. Multi-level generator 197 can provide a signal to a multi-level envelope tracker 193 as well as a filtered envelope generator 198. Filtered envelope generator 198 can provide a signal to DPD 140. Otherwise, multi-level envelope tracker 193 can function similarly to the fast or real-time envelope tracker described above with reference to FIG. IB.

[0035] Certain embodiments of the present disclosure may take advantage of certain benefits. FIG. 2 illustrates a control scheme according to certain embodiments of the present disclosure. As shown in FIG. 2, for each symbol, on a symbol-by-symbol basis, the system may make a power level determination at 210. This power level determination may be a determination of the average power of the symbol. The system may compare this power level to a threshold. If the power level is below the threshold, the system may implement constant level power tracking for the symbol. Thus, the power amplifier may receive a single power level value from an SMPS or similar device.

[0036] If the power level is determined to be above the threshold at 210, then the system may make a further determination regarding signal quality at 220. If the signal quality of the symbol is needed to be above a certain threshold level, then constant level power tracking can be used at 230. On the other hand, if the signal quality of the symbol can be below a given threshold, then at 240 the system can apply multi-level envelope tracking.

[0037] Thus, at a relatively high power level and when the signal quality requirement is low, such as quaternary phase shift keying (QPSK), 16 point quadrature amplitude modulation (16QAM), or 64QAM, the system can choose multi-level ET for best efficiency. On the other hand, when there is a relatively high power level but the signal quality requirement is high, such as 256QAM or 1024QAM, the system can choose constant-level power tracking for improved signal quality at the cost of lowered efficiency. At low power level, regardless of signal quality requirements, the system can simply always use constant-level power tracking, which may provide simplicity and high signal quality.

[0038] Average power tracking can still be applied, and thus Vcc as the input to the power amplifier can still change, but only at the symbol level, in certain embodiments. Because a multi level ET tracker can generate various constant levels, switching between multi-level ET and constant level power tracking can be performed simply and quickly.

[0039] FIG. 3 illustrates a system according to certain embodiments. FIG. 3 is a simplified block diagram. Thus, for example, while digital-to-analog conversion may take place as shown in the previous examples, the digital-to-analog conversion elements are not shown in this drawing.

[0040] As shown in FIG. 3, an input signal x(t) may be provided to DPD 140 and multi level generator 197. The multi-level generator 197 may operate to produce a stepped signal as described above, with or without the further filtering or smoothing mentioned above. The multi level generator 197 may provide its output to a controller 310 or other element configured for selection between envelope and constant control. Controller 310 may also receive information regarding a given symbol, for example, from higher layers of a protocol stack (not shown). The information may include information such as a needed or desired signal quality level of the symbol and/or an average power level of the symbol. A symbol is used as an example of any unit of data that may be handled as a group by the system. Thus, for example, an evaluation or decision may be made at a different granularity than a single symbol. For example, a constellation of symbols may be considered together, or another unit, such as a transport block or protocol data unit may be considered. The signal quality level may be indicated in terms of a quality of service (QoS), target signal to noise ratio (SNR), or any other desired measure of signal quality. The signal quality level may also be even more indirectly indicated, such as by indicating that the symbol corresponds to a control or data packet. Thus, for example, in certain embodiments, control packets may require a higher signal quality, whereas data packets may be tolerated at a lower signal quality. Thus, controller 310 may infer the signal quality level from whether the symbol corresponds to control or data.

[0041] FIG. 4 illustrates a comparison of various tracking approaches. As shown in FIG.

4, a fast or real-time tracked signal 410 may correspond to the absolute value of the input signal. The horizontal axis may represent time, and the vertical axis may representative voltage, with voltage zero and an arbitrary starting time as the bottom left corner of the graph in FIG. 4. A multi level tracked signal 420 may periodically round up the value to the next half volt level. A filtered tracked signal 430 may, as illustrated in this example, be a low-pass filtered version of the multi level tracked signal 420. By contrast, to these approaches, a constant power level tracking approach may simply apply a uniform power level to the entire symbol. A uniform power level may correspond to any of the illustrated horizontal lines representing various voltage levels, or possibly may correspond to a still higher value than shown. There may be various tradeoffs. For example, a constant power level tracking approach may reduce the switching noise of the device, whereas other approaches may provide higher power efficiency.

[0042] FIG. 5 illustrates a method according to certain embodiments. As shown in FIG. 5, a method can include, at 510, receiving an input signal representative of an intended transmission, wherein the input signal comprises a symbol. This input signal may correspond to x(t) in FIG. 3. [0043] As also shown in FIG. 5, the method can also include, at 520, receiving information regarding the symbol separately from receiving the input signal. Thus, the receiving at 510 may be done by a different device within, for example, RF chip 704, as illustrated in FIG. 7. To put it differently, as shown in FIG. 3, x(t) may be received at multi-level generator 197, whereas symbol information may be received at controller 310, both of which may be part of a digital front end of an RF chip.

[0044] As shown in FIG. 5, the method can further include, at 530, selecting a processing path from at least two processing paths based on the information regarding the symbol. This selection may be made once per symbol or other units of transmission. The selection can be performed using the logic shown in FIG. 2.

[0045] As further shown in FIG. 5, the method can include, at 540, processing the input signal based on the selected processing path to provide a control signal. The control signal may be a single voltage level or a signal corresponding to, for example, an envelope of the input signal. Several examples of the latter are shown in FIG. 4.

[0046] As shown in FIG. 5, the method can also include, at 550, supplying the control signal to a power amplifier in parallel to a modified form of the input signal. The modified form of the input may be, for example, a pre-distorted and analog version of the input signal, which may have been a digital signal.

[0047] The information regarding the symbol can be a signal quality level for the symbol, power level information for the signal, or other information about the symbol, such as whether the symbol corresponds to the control plane or user plane information.

[0048] The selecting at 530 can include comparing the signal quality level to a threshold signal quality level, as shown at 220 in FIG. 2. More particularly, the selecting at 530 can include selecting constant level power tracking for the symbol when the signal quality level is above the threshold and/or selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold. The threshold can be set up arbitrarily, such that the value is always either above or below the threshold. Alternatively, “above the threshold” can mean “at or above the threshold,” or as another alternative, “below the threshold” can mean “at or below the threshold.” Thus, the threshold value itself can be considered to be matched to either the “above” or “below” path shown in FIG. 2.

[0049] As mentioned above, the information regarding the symbol can include power level information for the symbol. The power level information can include the average power of the

symbol. Other power level information, such as maximum power, a minimum power, or the like, may be used. The power level information may be explicitly or implicitly indicated.

[0050] The selecting at 530 can include selecting constant level power tracking for the symbol when a power level indicated in the power level information is below a threshold and/or performing a further determination when a power level indicated in the power level information is above a threshold, as shown at 210 in FIG. 2. The further determination may be, as shown in FIG.

2 at 220, determining whether a signal quality level for the symbol is above or below a threshold. The selecting can then also include selecting constant level power tracking for the symbol when the signal quality level is above the threshold and/or selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold. Thus, the selection at 220 can be performed by itself or as a follow-on step to the power level determination at 210.

[0051] FIG. 6 illustrates a node according to certain embodiments. As shown in FIG. 6, a node 600 may include a processor 602, a memory 604, a transceiver 606. These components are shown as connected to one another by bus 608, but other connection types are also permitted. When node 600 is user equipment 802 (see FIG. 8, described below), additional components may also be included, such as a user interface (UI), sensors, and the like. Similarly, node 600 may be implemented as a blade in a server system when node 600 is configured as core network element 806 (see FIG. 8, described below). Other implementations are also possible.

[0052] Transceiver 606 may include any suitable device for sending and/or receiving data.

Transceiver 606 may include the circuitry shown in FIG. 2 and may implement the method of FIG.

6. Node 600 may include one or more transceivers, although only one transceiver 606 is shown for simplicity of illustration. An antenna 610 is shown as a possible communication mechanism for node 600. Multiple antennas and/or arrays of antennas may be utilized. Additionally, examples of node 600 may communicate using wired techniques rather than (or in addition to) wireless techniques. For example, access node 804 may communicate wirelessly to user equipment 802 and may communicate by a wired connection (for example, by optical or coaxial cable) to core network element 806. Other communication hardware, such as a network interface card (NIC), may be included as well.

[0053] As shown in FIG. 6, node 600 may include processor 602. Although only one processor is shown, it is understood that multiple processors can be included. Processor 602 may include microprocessors, microcontrollers, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), programmable logic devices

(PLDs), state machines, gated logic, discrete hardware circuits, and other suitable hardware configured to perform the various functions described throughout the present disclosure. Processor 602 may be a hardware device having one or many processing cores. Processor 602 may execute software. Software shall be construed broadly to mean instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or otherwise. Software can include computer instructions written in an interpreted language, a compiled language, or machine code. Other techniques for instructing hardware are also permitted under the broad category of software. Processor 602 may be a baseband chip, such as baseband chip 702 in FIG. 7. Node 600 may also include other processors, not shown, such as a central processing unit of the device, a graphics processor, or the like. Processor 602 may include internal memory (also known as local memory, not shown in FIG. 6) that may serve as memory for L2 data. Processor 602 may include an RF chip, for example, integrated into a baseband chip, or an RF chip may be provided separately. Processor 602 may be configured to operate as a modem of node 600, or may be one element or component of a modem. Other arrangements and configurations are also permitted.

[0054] As shown in FIG. 6, node 600 may also include memory 604. Although only one memory is shown, it is understood that multiple memories can be included. Memory 604 can broadly include both memory and storage. For example, memory 604 may include random-access memory (RAM), read-only memory (ROM), SRAM, dynamic RAM (DRAM), ferro-electric RAM (FRAM), electrically erasable programmable ROM (EEPROM), CD-ROM or other optical disk storage, hard disk drive (HDD), such as magnetic disk storage or other magnetic storage devices, Flash drive, solid-state drive (SSD), or any other medium that can be used to carry or store desired program code in the form of instructions that can be accessed and executed by processor 602. Broadly, memory 604 may be embodied by any computer-readable medium, such as a non-transitory computer-readable medium. The memory 604 can be the external memory 708 in FIG.

7. The memory 604 may be shared by processor 602 and other components of node 600, such as the unillustrated graphic processor or central processing unit.

[0055] FIG. 7 illustrates a block diagram of an apparatus 700 including a baseband chip

702, an RF chip 704, and a host chip 706, according to some embodiments of the present disclosure.

Apparatus 700 may be an example of any suitable node of wireless network 800 in FIG. 8, such as user equipment 802 or access node 804.

[0056] As shown in FIG. 7, apparatus 700 may include baseband chip 702, RF chip 704, host chip 706, and one or more antennas 710. In some embodiments, baseband chip 702 is implemented by processor 602 and memory 604, and RF chip 704 is implemented by processor 602, memory 604, and transceiver 606, as described above with respect to FIG. 6. Besides the on-chip memory (also known as “internal memory” or “local memory,” e.g., registers, buffers, or caches) on each chip 702, 704, or 706, apparatus 700 may further include an external memory 708 (e.g., the system memory or main memory) that can be shared by each chip 702, 704, or 706 through the system/main bus. Although baseband chip 702 is illustrated as a standalone SoC in FIG. 7, it is understood that in one example, baseband chip 702 and RF chip 704 may be integrated as one SoC; in another example, baseband chip 702 and host chip 706 may be integrated as one SoC; in still another example, baseband chip 702, RF chip 704, and host chip 706 may be integrated as one SoC, as described above. Thus, for example, the circuitry illustrated in FIG. 3 may be implemented on both an RF chip 704 and baseband chip 702, or on a single chip. Other implementations are also possible.

[0057] RF chip 704, either alone or in combination with baseband chip 702 may implement the method shown in FIG. 5 and may implement the logic shown in FIG. 2. Thus, for example, the input signal and symbol information (or either the input signal or the symbol information) may be provided to RF chip 704 from baseband chip 702. Other implementations are also possible, with this being a non-limiting example.

[0058] For transmission, also sometimes referred to as uplink, host chip 706 may generate raw data and send it to baseband chip 702 for encoding, modulation, and mapping. Baseband chip 702 may also access the raw data generated by host chip 706 and stored in external memory 708, for example, using the direct memory access (DMA). Baseband chip 702 may first encode (e.g., by source coding and/or channel coding) the raw data and modulate the coded data using any suitable modulation techniques, such as multi-phase pre-shared key (MPSK) modulation or quadrature amplitude modulation (QAM). Baseband chip 702 may perform any other functions, such as symbol or layer mapping, to convert the raw data into a signal that can be used to modulate the carrier frequency for transmission. In the uplink, baseband chip 702 may send the modulated signal to RF chip 704. RF chip 704, through the transmitter (Tx), may convert the modulated signal in the digital form into analog signals, i.e., radio frequency signals, and perform any suitable front-end radio frequency functions, such as filtering, up-conversion, or sample-rate conversion. Antenna 710 (e.g., an antenna array) may transmit the radio frequency signals provided by the transmitter of RF chip 704.

[0059] In the downlink, antenna 710 may receive radio frequency signals and pass the radio frequency signals to the receiver (Rx) of RF chip 704. RF chip 704 may perform any suitable front-end radio frequency functions, such as filtering, down-conversion, or sample-rate conversion, and convert the radio frequency signals into low-frequency digital signals (baseband signals) that can be processed by baseband chip 702. In the downlink, baseband chip 702 may demodulate and decode the baseband signals to extract raw data that can be processed by host chip 706. Baseband chip 702 may perform additional functions, such as error checking, de-mapping, channel estimation, descrambling, etc. The raw data provided by baseband chip 702 may be sent to host chip 706 directly or stored in external memory 708.

[0060] FIG. 8 illustrates a wireless network according to certain embodiments. As shown in FIG. 8, wireless network 800 may include a network of nodes, such as a UE 802, an access node 804, and a core network element 806. User equipment 802 may be any terminal device, such as a mobile phone, a desktop computer, a laptop computer, a tablet, a vehicle computer, a gaming console, a printer, a positioning device, a wearable electronic device, a smart sensor, or any other device capable of receiving, processing, and transmitting information, such as any member of a vehicle to everything (V2X) network, a cluster network, a smart grid node, or an Internet-of-Things (IoT) node. It is understood that user equipment 802 is illustrated as a mobile phone simply by way of illustration and not by way of limitation.

[0061] Access node 804 may be a device that communicates with user equipment 802, such as a wireless access point, a base station (BS), a Node B, an enhanced Node B (eNodeB or eNB), a next-generation NodeB (gNodeB or gNB), a cluster master node, or the like. Access node 804 may have a wired connection to user equipment 802, a wireless connection to user equipment 802, or any combination thereof. Access node 804 may be connected to user equipment 802 by multiple connections, and user equipment 802 may be connected to other access nodes in addition to access node 804. Access node 804 may also be connected to other UEs. It is understood that access node 804 is illustrated by a radio tower by way of illustration and not by way of limitation.

[0062] Core network element 806 may serve access node 804 and user equipment 802 to provide core network services. Examples of core network element 806 may include a home subscriber server (HSS), a mobility management entity (MME), a serving gateway (SGW), or a

packet data network gateway (PGW). These are examples of core network elements of an evolved packet core (EPC) system, which is a core network for the LTE system. Other core network elements may be used in LTE and in other communication systems. In some embodiments, core network element 806 includes an access and mobility management function (AMF) device, a session management function (SMF) device, or a user plane function (UPF) device, of a core network for the NR system. It is understood that core network element 806 is shown as a set of rack-mounted servers by way of illustration and not by way of limitation.

[0063] Core network element 806 may connect with a large network, such as the Internet

808, or another IP network, to communicate packet data over any distance. In this way, data from user equipment 802 may be communicated to other UEs connected to other access points, including, for example, a computer 810 connected to Internet 808, for example, using a wired connection or a wireless connection, or to a tablet 812 wirelessly connected to Internet 808 via a router 814. Thus, computer 810 and tablet 812 provide additional examples of possible UEs, and router 814 provides an example of another possible access node.

[0064] A generic example of a rack-mounted server is provided as an illustration of core network element 806. However, there may be multiple elements in the core network including database servers, such as a database 816, and security and authentication servers, such as an authentication server 818. Database 816 may, for example, manage data related to user subscription to network services. A home location register (HLR) is an example of a standardized database of subscriber information for a cellular network. Likewise, authentication server 818 may handle authentication of users, sessions, and so on. In the NR system, an authentication server function (AUSF) device may be the specific entity to perform user equipment authentication. In some embodiments, a single server rack may handle multiple such functions, such that the connections between core network element 806, authentication server 818, and database 816, may be local connections within a single rack.

[0065] Although the above-description used uplink processing of a signal in a UE as examples in various discussions, similar techniques may likewise be used for the other direction of processing and for processing in other devices, such as access nodes, and core network nodes. For example, any device that transmits signals with a power amplifier may benefit some embodiments of the present disclosure, even if not specifically listed above or illustrated in the example network of FIG. 8.

[0066] Each of the elements of FIG. 8 may be considered a node of wireless network 800.

More detail regarding the possible implementation of a node is provided by way of example in the description of a node 600 in FIG. 6 above. Node 600 may be configured as user equipment 802, access node 804, or core network element 806 in FIG. 8. Similarly, node 600 may also be configured as computer 810, router 814, tablet 812, database 816, or authentication server 818 in FIG. 8.

[0067] In various aspects of the present disclosure, the functions described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or encoded as instructions or code on a non-transitory computer-readable medium. Computer-readable media includes computer storage media. Storage media may be any available media that can be accessed by a computing device, such as node 600 in FIG. 6. By way of example, and not limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, HDD, such as magnetic disk storage or other magnetic storage devices, Flash drive, SSD, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a processing system, such as a mobile device or a computer. Disk and disc, as used herein, includes CD, laser disc, optical disc, DVD, and floppy disk where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0068] According to one aspect of the present disclosure, a method for switched envelope tracking can include receiving an input signal representative of an intended transmission. The input signal can include a symbol. The method can also include receiving information regarding the symbol separately from the receiving the input signal. The method can further include selecting a processing path from at least two processing paths based on the information regarding the symbol. The method can additionally include processing the input signal based on the selected processing path to provide a control signal. The method can also include supplying the control signal to a power amplifier in parallel to a modified form of the input signal.

[0069] In some embodiments, the information regarding the symbol can include a signal quality level for the symbol.

[0070] In some embodiments, the selecting can include comparing the signal quality level to a threshold of the signal quality level.

[0071] In some embodiments, the selecting can include selecting constant level power tracking for the symbol when the signal quality level is above the threshold.

[0072] In some embodiments, the selecting can include selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

[0073] In some embodiments, the information regarding the symbol can include power level information for the symbol.

[0074] In some embodiments, the power level information can include an average power of the symbol.

[0075] In some embodiments, the selecting can include selecting constant level power tracking for the symbol when a power level indicated in the power level information is below a threshold of the power level.

[0076] In some embodiments, the selecting can include performing a further determination when a power level indicated in the power level information is above a threshold of the power level.

[0077] In some embodiments, the further determination can include determining whether a signal quality level for the symbol is above or below a threshold of the signal quality level.

[0078] In some embodiments, the selecting can include selecting constant level power tracking for the symbol when the signal quality level is above the threshold.

[0079] In some embodiments, the selecting can include selecting multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

[0080] According to another aspect of the present disclosure, an apparatus for switched envelope tracking can include an envelope generator (for example, multi-level generator 197 shown in FIG. 3) configured to receive an input signal representative of an intended transmission. The input signal can include a symbol. The apparatus can also include a controller (for example, controller 310 in FIG. 3) configured to receive information regarding the symbol. The information regarding the symbol can be received separately from the input signal. The controller can also be configured to select a processing path from at least two processing paths based on the information regarding the symbol. The input signal can be processed based on the selected processing path to provide a control signal. The controller can be further configured to supply the control signal to a power amplifier in parallel to a modified form of the input signal.

[0081] In some embodiments, the information regarding the symbol can include a signal quality level for the symbol.

[0082] In some embodiments, the controller can be configured to select the processing path based on a comparison of the signal quality level to a threshold signal quality level.

[0083] In some embodiments, the controller can be configured to select constant level power tracking for the symbol when the signal quality level is above the threshold.

[0084] In some embodiments, the controller can be configured to select multi-level envelope tracking for the symbol when the signal quality level is below the threshold.

[0085] In some embodiments, the information regarding the symbol can include power level information for the symbol.

[0086] In some embodiments, the controller can be configured to select constant level power tracking for the symbol when a power level indicated in the power level information is below a threshold of the power level.

[0087] In some embodiments, the controller can be configured to perform a further determination when a power level indicated in the power level information is above a threshold of the power level.

[0088] According to a further aspect of the present disclosure, an RF chip can include a power amplifier and an envelope generator configured to receive an input signal representative of an intended transmission to be amplified in the power amplifier. The input signal can include a symbol. The RF chip can also include a controller configured to receive information regarding the symbol. The information regarding the symbol can be received separately from the input signal. The controller can also be configured to select a processing path from at least two processing paths based on the information regarding the symbol. The input signal can be processed based on the selected processing path to provide a control signal. The controller can be further configured to supply the control signal to the power amplifier. The RF can further include a digital to analog converter configured to convert the input signal from digital form to analog form and to provide the analog form of the input signal to the power amplifier.

[0089] The foregoing description of the specific embodiments will so reveal the general nature of the present disclosure that others can, by applying knowledge within the skill of the art, readily modify and/or adapt for various applications such specific embodiments, without undue experimentation, without departing from the general concept of the present disclosure. Therefore, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments, based on the teaching and guidance presented herein. It is to be understood that the phraseology or terminology herein is for the purpose of description and not of limitation, such that the terminology or phraseology of the present specification is to be interpreted by the skilled artisan in light of the teachings and guidance.

[0090] Embodiments of the present disclosure have been described above with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined so long as the specified functions and relationships thereof are appropriately performed.

[0091] The Summary and Abstract sections may set forth one or more but not all exemplary embodiments of the present disclosure as contemplated by the inventor(s), and thus, are not intended to limit the present disclosure and the appended claims in any way.

[0092] Various functional blocks, modules, and steps are disclosed above. The particular arrangements provided are illustrative and without limitation. Accordingly, the functional blocks, modules, and steps may be re-ordered or combined in different ways than in the examples provided above. Likewise, certain embodiments include only a subset of the functional blocks, modules, and steps, and any such subset is permitted.

[0093] The breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.