(12) International Application Status Report

Received at International Bureau: 03 May 2018 (03.05.2018)

Information valid as of: 08 February 2019 (08.02.2019)

Report generated on: 20 August 2019 (20.08.2019)

(10) Publication number: (43) Publication date: (26) Publication language:
WO 2019/04578607 March 2019 (07.03.2019) English (EN)

(21) Application number: (22) Filing date: (25) Filing language:
PCT/US2018/02782216 April 2018 (16.04.2018) English (EN)

(31) Priority number(s): (32) Priority date(s): (33) Priority status:
15/693,173 (US)31 August 2017 (31.08.2017) Priority document received (in compliance with PCT Rule 17.1)

(51) International Patent Classification:
G11C 7/10 (2006.01); G11C 8/12 (2006.01); G06F 1/32 (2006.01)

(71) Applicant(s):
MICRON TECHNOLOGY, INC [US/US]; 8000 South Federal Way Boise, Idaho 83707 (US) (for all designated states)

(72) Inventor(s):
KANDIKONDA, Ravi Kiran; 12432 Fallcreek Dr. Frisco, Texas 75035 (US)

(74) Agent(s):
MANWARE, Robert A.; P.O. Box 692289 Houston, Texas 77269 (US)

(54) Title (EN): SYSTEMS AND METHODS FOR DATA PATH POWER SAVINGS IN DDR5 MEMORY DEVICES
(54) Title (FR): SYSTÈMES ET PROCÉDÉS POUR DES ÉCONOMIES D'ÉNERGIE DE CHEMIN DE DONNÉES DANS DES DISPOSITIFS DE MÉMOIRE DDR5

(57) Abstract:
(EN): A memory device includes a data path having a data bus. The memory derive further includes a first one-hot communications interface communicatively coupled to the data bus, and a second one-hot communications interface communicatively coupled to the data bus. The memory device additionally includes at least one memory bank, and an input/output (I/O) interface communicatively coupled to the at least one memory bank via the first one-hot communications interface and the second one-hot communications interface, wherein the first one-hot communications interface is configured to convert a first data pattern received by the I/O interface into one-hot signals transmitted via the data bus to the second one-hot communications interface, and wherein the second one-hot communications interface is configured to convert the one-hot signals into the first data pattern to be stored in the at least one memory bank.
(FR): L'invention concerne un dispositif de mémoire qui comprend un chemin de données comportant un bus de données. Le dispositif de mémoire comprend en outre une première interface de communication 1 parmi n couplée en communication au bus de données, et une seconde interface de communication 1 parmi n couplée en communication au bus de données. Le dispositif de mémoire comprend en outre au moins un bloc mémoire, et une interface d'entrée/sortie (E/S) couplée en communication avec le ou les blocs mémoire par l'intermédiaire de la première interface de communication 1 parmi n et de la seconde interface de communication 1 parmi n, la première interface de communication 1 parmi n étant configurée pour convertir un premier motif de données reçu par l'interface E/S en signaux 1 parmi n transmis par l'intermédiaire du bus de données à la seconde interface de communication 1 parmi n, et la seconde interface de communication 1 parmi n étant configurée pour convertir les signaux 1 parmi n dans le premier motif de données à stocker dans le ou les blocs mémoire.

International search report:
Received at International Bureau: 14 August 2018 (14.08.2018) [KR]

International Report on Patentability (IPRP) Chapter II of the PCT:
Not available

(81) Designated States:
AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
European Patent Office (EPO) : AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR
African Intellectual Property Organization (OAPI) : BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG
African Regional Intellectual Property Organization (ARIPO) : BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW
Eurasian Patent Organization (EAPO) : AM, AZ, BY, KG, KZ, RU, TJ, TM

Declarations:
Declaration made as applicant's entitlement, as at the international filing date, to apply for and be granted a patent (Rules 4.17(ii) and 51bis.1(a)(ii)), in a case where the declaration under Rule 4.17(iv) is not appropriate
Declaration made as applicant's entitlement, as at the international filing date, to claim the priority of the earlier application, where the applicant is not the applicant who filed the earlier application or where the applicant's name has changed since the filing of the earlier application (Rules 4.17(iii) and 51bis.1(a)(iii))